986 lines
19 KiB
Plaintext
986 lines
19 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/input/rk-input.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/display/rockchip_vop.h>
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#include <dt-bindings/sensor-dev.h>
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#include "rk3568.dtsi"
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/ {
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cspmu: cspmu@fd90c000 {
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compatible = "rockchip,cspmu";
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reg = <0x0 0xfd90c000 0x0 0x1000>,
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<0x0 0xfd90d000 0x0 0x1000>,
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<0x0 0xfd90e000 0x0 0x1000>,
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<0x0 0xfd90f000 0x0 0x1000>;
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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debug: debug@fd904000 {
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compatible = "rockchip,debug";
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reg = <0x0 0xfd904000 0x0 0x1000>,
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<0x0 0xfd905000 0x0 0x1000>,
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<0x0 0xfd906000 0x0 0x1000>,
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<0x0 0xfd907000 0x0 0x1000>;
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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hdmi_sound: hdmi-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <128>;
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simple-audio-card,name = "rockchip,hdmi";
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&hdmi>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_net_en>, <&led_sata_en>, <&led_work_en>;
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led_net: net {
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gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
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label = "blue:net";
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};
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led_sata: sata {
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gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
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label = "amber:sata";
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};
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led_work: work {
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gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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label = "green:work";
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linux,default-trigger = "heartbeat";
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};
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};
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rk809_sound: rk809-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,rk809-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s1_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&rk809_codec>;
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};
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};
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rk_headset: rk-headset {
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compatible = "rockchip_headset";
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headset_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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};
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vcc5v0_sys: vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_sys_en>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_pcie: vcc3v3-pcie {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc3v3_pcie";
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startup-delay-us = <5000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_otg_en>;
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};
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};
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&bus_npu {
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bus-supply = <&vdd_logic>;
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pvtm-supply = <&vdd_cpu>;
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status = "okay";
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};
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&combphy0_us {
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status = "okay";
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};
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&combphy1_usq {
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status = "okay";
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};
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&combphy2_psq {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&dfi {
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status = "okay";
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};
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&dmc {
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center-supply = <&vdd_logic>;
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status = "okay";
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};
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&gpu {
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clock-names = "gpu", "bus";
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interrupt-names = "gpu", "mmu", "job";
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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status = "okay";
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rockchip,phy-table =
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<92812500 0x8009 0x0000 0x0270>,
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<165000000 0x800b 0x0000 0x026d>,
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<185625000 0x800b 0x0000 0x01ed>,
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<297000000 0x800b 0x0000 0x01ad>,
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<594000000 0x8029 0x0000 0x0088>,
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<000000000 0x0000 0x0000 0x0000>;
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};
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&hdmi_in_vp0 {
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status = "okay";
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};
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&hdmi_in_vp1 {
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status = "disabled";
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};
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&i2c0 {
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status = "okay";
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vdd_cpu: tcs4525@1c {
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compatible = "tcs,tcs452x";
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reg = <0x1c>;
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vin-supply = <&vcc5v0_sys>;
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regulator-compatible = "fan53555-reg";
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1390000>;
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regulator-init-microvolt = <900000>;
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regulator-initial-mode = <1>;
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regulator-ramp-delay = <2300>;
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fcs,suspend-voltage-selector = <1>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default", "pmic-sleep",
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"pmic-power-off", "pmic-reset";
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pinctrl-0 = <&pmic_int>;
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pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
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pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
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pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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//fb-inner-reg-idxs = <2>;
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/* 1: rst regs (default in codes), 0: rst the pmic */
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pmic-reset-func = <0>;
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/* not save the PMIC_POWER_EN register in uboot */
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not-save-power-en = <1>;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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pwrkey {
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status = "okay";
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};
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pinctrl_rk8xx: pinctrl_rk8xx {
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gpio-controller;
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#gpio-cells = <2>;
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rk817_slppin_null: rk817_slppin_null {
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pins = "gpio_slp";
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function = "pin_fun0";
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};
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rk817_slppin_slp: rk817_slppin_slp {
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pins = "gpio_slp";
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function = "pin_fun1";
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};
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rk817_slppin_pwrdn: rk817_slppin_pwrdn {
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pins = "gpio_slp";
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function = "pin_fun2";
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};
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rk817_slppin_rst: rk817_slppin_rst {
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pins = "gpio_slp";
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function = "pin_fun3";
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};
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};
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_logic";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_gpu";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-name = "vcc_ddr";
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vdd_npu: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <1350000>;
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regulator-init-microvolt = <900000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x2>;
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regulator-name = "vdd_npu";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda0v9_image: LDO_REG1 {
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdda0v9_image";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda_0v9: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdda_0v9";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdda0v9_pmu: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vdda0v9_pmu";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <900000>;
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};
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};
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vccio_acodec: LDO_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vccio_acodec";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vccio_sd: LDO_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_pmu: LDO_REG6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc3v3_pmu";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcca_1v8: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcca_1v8";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcca1v8_pmu: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcca1v8_pmu";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcca1v8_image: LDO_REG9 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcca1v8_image";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_1v8: DCDC_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc_1v8";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_3v3: SWITCH_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_3v3";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_sd: SWITCH_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc3v3_sd";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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rk809_codec: codec {
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#sound-dai-cells = <0>;
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compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
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clocks = <&cru I2S1_MCLKOUT>;
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clock-names = "mclk";
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assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
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assigned-clock-rates = <12288000>;
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assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1m0_mclk>;
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hp-volume = <20>;
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spk-volume = <3>;
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mic-in-differential;
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status = "okay";
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};
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};
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};
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&i2s0_8ch {
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status = "okay";
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};
|
|
|
|
&i2s1_8ch {
|
|
status = "okay";
|
|
rockchip,clk-trcm = <1>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s1m0_sclktx
|
|
&i2s1m0_lrcktx
|
|
&i2s1m0_sdi0
|
|
&i2s1m0_sdo0>;
|
|
};
|
|
|
|
&iep {
|
|
status = "okay";
|
|
};
|
|
|
|
&iep_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpegd {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpegd_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&nandc0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
nand@0 {
|
|
reg = <0>;
|
|
nand-bus-width = <8>;
|
|
nand-ecc-mode = "hw";
|
|
nand-ecc-strength = <16>;
|
|
nand-ecc-step-size = <1024>;
|
|
};
|
|
};
|
|
|
|
&pcie2x1 {
|
|
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_sys>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie30phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie3x1 {
|
|
rockchip,bifurcation;
|
|
reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_pcie>;
|
|
status = "okay";
|
|
|
|
pcie@0,0 {
|
|
reg = <0x00100000 0 0 0 0>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
|
|
rtl8125_1: pcie@10,0 {
|
|
reg = <0x000000 0 0 0 0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie3x2 {
|
|
rockchip,bifurcation;
|
|
rockchip,init-delay-ms = <100>;
|
|
reset-gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_pcie>;
|
|
status = "okay";
|
|
|
|
pcie@0,0 {
|
|
reg = <0x00200000 0 0 0 0>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
|
|
rtl8125_2: pcie@20,0 {
|
|
reg = <0x000000 0 0 0 0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
headphone {
|
|
hp_det: hp-det {
|
|
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
led_net_en: led-net-en {
|
|
rockchip,pins =
|
|
<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
led_sata_en: led-sata-en {
|
|
rockchip,pins =
|
|
<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
led_work_en: led-work-en {
|
|
rockchip,pins =
|
|
<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int: pmic_int {
|
|
rockchip,pins =
|
|
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
soc_slppin_gpio: soc_slppin_gpio {
|
|
rockchip,pins =
|
|
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
|
|
};
|
|
|
|
soc_slppin_slp: soc_slppin_slp {
|
|
rockchip,pins =
|
|
<0 RK_PA2 1 &pcfg_pull_none>;
|
|
};
|
|
|
|
soc_slppin_rst: soc_slppin_rst {
|
|
rockchip,pins =
|
|
<0 RK_PA2 2 &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
usb {
|
|
vcc5v0_otg_en: vcc5v0-otg-en {
|
|
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
vcc {
|
|
vcc3v3_sys_en: vcc3v3-sys-en {
|
|
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
pmuio1-supply = <&vcc3v3_pmu>;
|
|
pmuio2-supply = <&vcc3v3_pmu>;
|
|
vccio1-supply = <&vccio_acodec>;
|
|
vccio2-supply = <&vcc_1v8>;
|
|
vccio3-supply = <&vccio_sd>;
|
|
vccio4-supply = <&vcc_1v8>;
|
|
vccio5-supply = <&vcc_3v3>;
|
|
vccio6-supply = <&vcc_1v8>;
|
|
vccio7-supply = <&vcc_3v3>;
|
|
};
|
|
|
|
&pwm3 {
|
|
status = "okay";
|
|
|
|
compatible = "rockchip,remotectl-pwm";
|
|
remote_pwm_id = <3>;
|
|
handle_cpu_id = <1>;
|
|
remote_support_psci = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwm3_pins>;
|
|
|
|
ir_key1 {
|
|
rockchip,usercode = <0x4040>;
|
|
rockchip,key_table =
|
|
<0xf2 KEY_REPLY>,
|
|
<0xba KEY_BACK>,
|
|
<0xf4 KEY_UP>,
|
|
<0xf1 KEY_DOWN>,
|
|
<0xef KEY_LEFT>,
|
|
<0xee KEY_RIGHT>,
|
|
<0xbd KEY_HOME>,
|
|
<0xea KEY_VOLUMEUP>,
|
|
<0xe3 KEY_VOLUMEDOWN>,
|
|
<0xe2 KEY_SEARCH>,
|
|
<0xb2 KEY_POWER>,
|
|
<0xbc KEY_MUTE>,
|
|
<0xec KEY_MENU>,
|
|
<0xbf 0x190>,
|
|
<0xe0 0x191>,
|
|
<0xe1 0x192>,
|
|
<0xe9 183>,
|
|
<0xe6 248>,
|
|
<0xe8 185>,
|
|
<0xe7 186>,
|
|
<0xf0 388>,
|
|
<0xbe 0x175>;
|
|
};
|
|
|
|
ir_key2 {
|
|
rockchip,usercode = <0xff00>;
|
|
rockchip,key_table =
|
|
<0xf9 KEY_HOME>,
|
|
<0xbf KEY_BACK>,
|
|
<0xfb KEY_MENU>,
|
|
<0xaa KEY_REPLY>,
|
|
<0xb9 KEY_UP>,
|
|
<0xe9 KEY_DOWN>,
|
|
<0xb8 KEY_LEFT>,
|
|
<0xea KEY_RIGHT>,
|
|
<0xeb KEY_VOLUMEDOWN>,
|
|
<0xef KEY_VOLUMEUP>,
|
|
<0xf7 KEY_MUTE>,
|
|
<0xe7 KEY_POWER>,
|
|
<0xfc KEY_POWER>,
|
|
<0xa9 KEY_VOLUMEDOWN>,
|
|
<0xa8 KEY_VOLUMEDOWN>,
|
|
<0xe0 KEY_VOLUMEDOWN>,
|
|
<0xa5 KEY_VOLUMEDOWN>,
|
|
<0xab 183>,
|
|
<0xb7 388>,
|
|
<0xe8 388>,
|
|
<0xf8 184>,
|
|
<0xaf 185>,
|
|
<0xed KEY_VOLUMEDOWN>,
|
|
<0xee 186>,
|
|
<0xb3 KEY_VOLUMEDOWN>,
|
|
<0xf1 KEY_VOLUMEDOWN>,
|
|
<0xf2 KEY_VOLUMEDOWN>,
|
|
<0xf3 KEY_SEARCH>,
|
|
<0xb4 KEY_VOLUMEDOWN>,
|
|
<0xbe KEY_SEARCH>;
|
|
};
|
|
|
|
ir_key3 {
|
|
rockchip,usercode = <0x1dcc>;
|
|
rockchip,key_table =
|
|
<0xee KEY_REPLY>,
|
|
<0xf0 KEY_BACK>,
|
|
<0xf8 KEY_UP>,
|
|
<0xbb KEY_DOWN>,
|
|
<0xef KEY_LEFT>,
|
|
<0xed KEY_RIGHT>,
|
|
<0xfc KEY_HOME>,
|
|
<0xf1 KEY_VOLUMEUP>,
|
|
<0xfd KEY_VOLUMEDOWN>,
|
|
<0xb7 KEY_SEARCH>,
|
|
<0xff KEY_POWER>,
|
|
<0xf3 KEY_MUTE>,
|
|
<0xbf KEY_MENU>,
|
|
<0xf9 0x191>,
|
|
<0xf5 0x192>,
|
|
<0xb3 388>,
|
|
<0xbe KEY_1>,
|
|
<0xba KEY_2>,
|
|
<0xb2 KEY_3>,
|
|
<0xbd KEY_4>,
|
|
<0xf9 KEY_5>,
|
|
<0xb1 KEY_6>,
|
|
<0xfc KEY_7>,
|
|
<0xf8 KEY_8>,
|
|
<0xb0 KEY_9>,
|
|
<0xb6 KEY_0>,
|
|
<0xb5 KEY_BACKSPACE>;
|
|
};
|
|
|
|
ir_key4 {
|
|
rockchip,usercode = <0xdd22>;
|
|
rockchip,key_table =
|
|
<0x23 KEY_POWER>,
|
|
<0x63 KEY_MUTE>,
|
|
<0x35 KEY_UP>,
|
|
<0x2d KEY_DOWN>,
|
|
<0x66 KEY_LEFT>,
|
|
<0x3e KEY_RIGHT>,
|
|
<0x31 KEY_ENTER>,
|
|
<0x6a KEY_ESC>,
|
|
<0x7d KEY_MENU>,
|
|
<0x7f KEY_VOLUMEUP>,
|
|
<0x7e KEY_VOLUMEDOWN>,
|
|
<0x77 KEY_HOME>;
|
|
};
|
|
};
|
|
|
|
&reserved_memory {
|
|
ramoops: ramoops@110000 {
|
|
compatible = "ramoops";
|
|
reg = <0x0 0x110000 0x0 0xf0000>;
|
|
record-size = <0x20000>;
|
|
console-size = <0x80000>;
|
|
ftrace-size = <0x00000>;
|
|
pmsg-size = <0x50000>;
|
|
};
|
|
|
|
rknpu_reserved: rknpu {
|
|
compatible = "shared-dma-pool";
|
|
inactive;
|
|
reusable;
|
|
size = <0x0 0x20000000>;
|
|
alignment = <0x0 0x1000>;
|
|
};
|
|
};
|
|
|
|
&rknpu {
|
|
memory-region = <&rknpu_reserved>;
|
|
rknpu-supply = <&vdd_npu>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rknpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rk_rga {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc {
|
|
venc-supply = <&vdd_logic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rng {
|
|
status = "okay";
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
status = "okay";
|
|
};
|
|
|
|
&route_hdmi {
|
|
status = "okay";
|
|
connect = <&vp0_out_hdmi>;
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vcca_1v8>;
|
|
};
|
|
|
|
&sata0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
non-removable;
|
|
max-frequency = <200000000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc0 {
|
|
max-frequency = <150000000>;
|
|
supports-sd;
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
sd-uhs-sdr104;
|
|
disable-wp;
|
|
vmmc-supply = <&vcc3v3_sd>;
|
|
vqmmc-supply = <&vccio_sd>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_host {
|
|
phy-supply = <&vcc5v0_otg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_otg {
|
|
vbus-supply = <&vcc5v0_otg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_host {
|
|
phy-supply = <&vcc5v0_otg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_otg {
|
|
phy-supply = <&vcc5v0_otg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3 {
|
|
dr_mode = "otg";
|
|
extcon = <&usb2phy0>;
|
|
phys = <&u2phy0_otg>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd30 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbhost_dwc3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbhost30 {
|
|
status = "okay";
|
|
};
|
|
|
|
&vdpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vdpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vepu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vepu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop {
|
|
status = "okay";
|
|
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
|
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
|
support-multi-area;
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vp0 {
|
|
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
|
|
};
|
|
|
|
&vp1 {
|
|
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
|
|
rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
|
|
};
|