236 lines
4.2 KiB
Plaintext

/dts-v1/;
/plugin/;
#include <dt-bindings/clock/rk3588-cru.h>
#include <dt-bindings/power/rk3588-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
/ {
compatible = "rockchip,rk3588";
fragment@0 {
target = <&camera_pwdn_gpio>;
__overlay__ {
status = "okay";
compatible = "regulator-fixed";
regulator-name = "camera_pwdn_gpio";
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam_pwdn_gpio>;
};
};
fragment@1 {
target = <&clk_cam_24m>;
__overlay__ {
status = "okay";
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "clk_cam_24m";
#clock-cells = <0>;
};
};
fragment@2 {
target = <&i2c3>;
__overlay__ {
status = "okay";
imx415: imx415@1a {
status = "okay";
compatible = "sony,imx415";
reg = <0x1a>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&mipim0_camera3_clk>;
power-domains = <&power RK3588_PD_VI>;
pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2022-PX1";
rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20";
port {
imx415_out0: endpoint {
remote-endpoint = <&mipidphy0_in_ucam0>;
data-lanes = <1 2 3 4>;
};
};
};
camera_imx219: camera-imx219@10 {
status = "disabled";
compatible = "sony,imx219";
reg = <0x10>;
clocks = <&clk_cam_24m>;
clock-names = "xvclk";
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v2";
rockchip,camera-module-lens-name = "default";
port {
imx219_out0: endpoint {
remote-endpoint = <&mipidphy0_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};
};
fragment@3 {
target = <&csi2_dphy0_hw>;
__overlay__ {
status = "okay";
};
};
fragment@4 {
target = <&csi2_dphy0>;
__overlay__ {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidphy0_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&imx415_out0>;
data-lanes = <1 2 3 4>;
};
mipidphy0_in_ucam1: endpoint@2 {
reg = <2>;
remote-endpoint = <&imx219_out0>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi2_csi2_input>;
};
};
};
};
};
fragment@5 {
target = <&mipi2_csi2>;
__overlay__ {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi2_in0>;
};
};
};
};
};
fragment@6 {
target = <&rkcif>;
__overlay__ {
status = "okay";
};
};
fragment@7 {
target = <&rkcif_mipi_lvds2>;
__overlay__ {
status = "okay";
port {
cif_mipi2_in0: endpoint {
remote-endpoint = <&mipi2_csi2_output>;
};
};
};
};
fragment@8 {
target = <&rkcif_mmu>;
__overlay__ {
status = "okay";
};
};
fragment@9 {
target = <&rkisp0>;
__overlay__ {
status = "okay";
};
};
fragment@10 {
target = <&isp0_mmu>;
__overlay__ {
status = "okay";
};
};
fragment@11 {
target = <&rkisp0_vir0>;
__overlay__ {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_vir0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds2_sditf>;
};
};
};
};
fragment@12 {
target = <&pinctrl>;
__overlay__ {
camera {
cam_pwdn_gpio: cam-pwdn-gpio {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
};
};