221 lines
3.7 KiB
Plaintext
221 lines
3.7 KiB
Plaintext
/dts-v1/;
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/plugin/;
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#include <dt-bindings/clock/rockchip,rk3576-cru.h>
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#include <dt-bindings/power/rk3576-power.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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/ {
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fragment@0 {
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target-path = "/";
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__overlay__ {
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camera1_pwdn_gpio: camera-pwdn-gpio {
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status = "okay";
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compatible = "regulator-fixed";
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regulator-name = "camera1_pwdn_gpio";
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam1_pwdn_gpio>;
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};
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};
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};
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fragment@1 {
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target = <&i2c5>;
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__overlay__ {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5m3_xfer>;
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ov13850: ov13850@10 {
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status = "okay";
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compatible = "ovti,ov13850";
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reg = <0x10>;
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clocks = <&cru CLK_MIPI_CAMERAOUT_M1>;
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clock-names = "xvclk";
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pinctrl-names = "default";
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pinctrl-0 = <&cam_clk1m0_clk1>;
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reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "ZC-OV13850R2A-V1";
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rockchip,camera-module-lens-name = "Largan-50064B31";
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port {
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ov13850_out0: endpoint {
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remote-endpoint = <&mipidphy0_in_ucam0>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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};
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fragment@2 {
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target = <&csi2_dphy0_hw>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@3 {
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target = <&csi2_dphy1_hw>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@4 {
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target = <&csi2_dphy0>;
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__overlay__ {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipidphy0_in_ucam0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ov13850_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi2_csi2_input>;
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};
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};
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};
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};
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};
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fragment@5 {
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target = <&mipi1_csi2>;
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__overlay__ {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi2_in0>;
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};
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};
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};
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};
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};
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fragment@6 {
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target = <&rkcif>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@7 {
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target = <&rkcif_mipi_lvds1>;
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__overlay__ {
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status = "okay";
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port {
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cif_mipi2_in0: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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};
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fragment@8 {
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target = <&rkcif_mipi_lvds1_sditf>;
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__overlay__ {
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status = "okay";
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port {
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mipi_lvds1_sditf: endpoint {
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remote-endpoint = <&isp_vir0_in0>;
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};
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};
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};
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};
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fragment@9 {
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target = <&rkcif_mmu>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@10 {
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target = <&rkisp>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@11 {
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target = <&rkisp_mmu>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@12 {
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target = <&rkisp_vir1>;
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__overlay__ {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_vir0_in0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds1_sditf>;
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};
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};
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};
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};
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fragment@13 {
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target = <&pinctrl>;
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__overlay__ {
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camera {
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cam1_pwdn_gpio: cam-pwdn-gpio {
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rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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};
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};
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