187 lines
4.5 KiB
Plaintext
187 lines
4.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/soc/rockchip-amp.h>
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#define CPU_GET_AFFINITY(cpu, cluster) ((cpu) << 8)
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#define RSVD0_IRQn 283
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#define RSVD_IRQn(_N) (RSVD0_IRQn + (_N))
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#define AMP_CPUOFF_REQ_IRQ(cpu) RSVD_IRQn(11 + (cpu)) /* gic irq: 294 */
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#define GIC_TOUCH_REQ_IRQ(cpu) (AMP_CPUOFF_REQ_IRQ(4) + cpu) /* gic irq: 298 */
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#define GPIO_IRQ_GROUP_DISABLE 0x0
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#define GPIO_IRQ_GROUP_EN_BANK_TYPE 0x1
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#define GPIO_IRQ_GROUP_EN_GROUP_TYPE 0x2
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#define GPIO4_IRQn 69
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#define GPIO3_IRQn 68
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#define GPIO2_IRQn 67
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#define GPIO1_IRQn 66
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#define GPIO0_IRQn 65
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/ {
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rockchip_amp: rockchip-amp {
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compatible = "rockchip,rk3568-amp";
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clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>,
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<&cru PCLK_TIMER>, <&cru CLK_TIMER4>, <&cru CLK_TIMER5>,
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<&cru ACLK_MCU>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart4m1_xfer>;
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status = "okay";
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amp-irqs = /bits/ 64 <
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GIC_AMP_IRQ_CFG_ROUTE(152, 0xd0, CPU_GET_AFFINITY(3, 0))
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GIC_AMP_IRQ_CFG_ROUTE(AMP_CPUOFF_REQ_IRQ(3), 0xd0, CPU_GET_AFFINITY(3, 0))
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GIC_AMP_IRQ_CFG_ROUTE(GIC_TOUCH_REQ_IRQ(3), 0xd0, CPU_GET_AFFINITY(3, 0))>;
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gpio-group-banks = <5>;
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gpio-group {
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status = "disabled";
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amp-gpio0 {
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gpio-bank-id = <0>;
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group-irq-en = <GPIO_IRQ_GROUP_EN_BANK_TYPE>;
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bank-type-cfg {
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hw-irq = <GPIO0_IRQn>;
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hw-irq-cpu-aff = /bits/ 64 <CPU_GET_AFFINITY(3, 0)>;
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prio = <0xd0>;
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status = "disabled";
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};
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};
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amp-gpio1 {
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gpio-bank-id = <1>;
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group-irq-en = <GPIO_IRQ_GROUP_EN_BANK_TYPE>;
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bank-type-cfg {
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hw-irq = <GPIO1_IRQn>;
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hw-irq-cpu-aff = /bits/ 64 <CPU_GET_AFFINITY(3, 0)>;
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prio = <0xd0>;
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status = "disabled";
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};
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};
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amp-gpio2 {
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gpio-bank-id = <2>;
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group-irq-en = <GPIO_IRQ_GROUP_EN_BANK_TYPE>;
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bank-type-cfg {
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hw-irq = <GPIO2_IRQn>;
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hw-irq-cpu-aff = /bits/ 64 <CPU_GET_AFFINITY(3, 0)>;
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prio = <0xd0>;
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status = "disabled";
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};
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};
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amp-gpio3 {
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gpio-bank-id = <3>;
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group-irq-en = <GPIO_IRQ_GROUP_EN_BANK_TYPE>;
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bank-type-cfg {
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hw-irq = <GPIO3_IRQn>;
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hw-irq-cpu-aff = /bits/ 64 <CPU_GET_AFFINITY(3, 0)>;
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prio = <0xd0>;
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status = "disabled";
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};
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};
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amp-gpio4 {
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gpio-bank-id = <4>;
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group-irq-en = <GPIO_IRQ_GROUP_EN_GROUP_TYPE>;
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bank-type-cfg {
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hw-irq = <GPIO4_IRQn>;
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hw-irq-cpu-aff = /bits/ 64 <CPU_GET_AFFINITY(3, 0)>;
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prio = <0xd0>;
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status = "disabled";
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};
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prio-group0 {
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group-prio = <0x80>;
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group-irq-id = <RSVD_IRQn(39) RSVD_IRQn(40)
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RSVD_IRQn(41) GPIO4_IRQn>;
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group-irq-aff = /bits/ 64 <CPU_GET_AFFINITY(0, 0)
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CPU_GET_AFFINITY(1, 0)
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CPU_GET_AFFINITY(2, 0)
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CPU_GET_AFFINITY(3, 0)>;
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group-irq-en = <0x1 0x1 0x1 0x1>;
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status = "disabled";
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};
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prio-group1 {
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group-prio = <0x90>;
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group-irq-id = <RSVD_IRQn(42) RSVD_IRQn(43)
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RSVD_IRQn(44) RSVD_IRQn(45)>;
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group-irq-aff = /bits/ 64 <CPU_GET_AFFINITY(0, 0)
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CPU_GET_AFFINITY(1, 0)
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CPU_GET_AFFINITY(2, 0)
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CPU_GET_AFFINITY(3, 0)>;
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group-irq-en = <0x0 0x1 0x1 0x1>;
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status = "disabled";
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};
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prio-group2 {
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group-prio = <0xA0>;
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group-irq-id = <RSVD_IRQn(46) RSVD_IRQn(47)
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RSVD_IRQn(48) RSVD_IRQn(49)>;
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group-irq-aff = /bits/ 64 <CPU_GET_AFFINITY(0, 0)
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CPU_GET_AFFINITY(1, 0)
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CPU_GET_AFFINITY(2, 0)
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CPU_GET_AFFINITY(3, 0)>;
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group-irq-en = <0x1 0x1 0x1 0x1>;
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status = "disabled";
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};
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};
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};
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amp_cpus: amp-cpus {
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amp-cpu3 {
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id = <0x0 0x300>;
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entry = <0x0 0x2800000>;
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boot-on = <1>;
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mode = <0>;
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};
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};
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* remote amp core address */
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amp_shmem_reserved: amp-shmem@7800000 {
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reg = <0x0 0x7800000 0x0 0x400000>;
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no-map;
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};
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rpmsg_reserved: rpmsg@7c00000 {
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reg = <0x0 0x7c00000 0x0 0x400000>;
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no-map;
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};
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rpmsg_dma_reserved: rpmsg-dma@8000000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0x8000000 0x0 0x100000>;
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no-map;
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};
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/* mcu address */
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mcu_reserved: mcu@8200000 {
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reg = <0x0 0x8200000 0x0 0x100000>;
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no-map;
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};
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};
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rpmsg: rpmsg@7c00000 {
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compatible = "rockchip,rpmsg";
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mbox-names = "rpmsg-rx", "rpmsg-tx";
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mboxes = <&mailbox 0 &mailbox 3>;
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rockchip,vdev-nums = <1>;
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rockchip,link-id = <0x03>;
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reg = <0x0 0x7c00000 0x0 0x20000>;
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memory-region = <&rpmsg_dma_reserved>;
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status = "okay";
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};
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};
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&mailbox {
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rockchip,txpoll-period-ms = <1>;
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status = "okay";
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};
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