235 lines
4.0 KiB
Plaintext
235 lines
4.0 KiB
Plaintext
/dts-v1/;
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/plugin/;
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#include <dt-bindings/clock/rk3588-cru.h>
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#include <dt-bindings/power/rk3588-power.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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/ {
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fragment@0 {
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target = <&mipi_dcphy0>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@1 {
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target = <&csi2_dcphy0>;
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__overlay__ {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_dcphy0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&imx415b_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidcphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi0_csi2_input>;
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};
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};
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};
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};
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};
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fragment@2 {
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target = <&mipi0_csi2>;
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__overlay__ {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidcphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in0>;
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};
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};
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};
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};
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};
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fragment@3 {
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target = <&rkcif_mipi_lvds>;
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__overlay__ {
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status = "okay";
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port {
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cif_mipi_in0: endpoint {
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remote-endpoint = <&mipi0_csi2_output>;
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};
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};
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};
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};
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fragment@4 {
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target = <&rkcif_mipi_lvds_sditf>;
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__overlay__ {
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status = "okay";
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port {
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp0_vir0>;
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};
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};
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};
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};
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fragment@5 {
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target = <&rkisp0_vir0>;
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__overlay__ {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_vir0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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};
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};
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};
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fragment@6 {
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target = <&i2c4>;
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__overlay__ {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m3_xfer>;
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dw9714b: dw9714b@c {
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compatible = "dongwoon,dw9714";
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status = "okay";
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reg = <0x0c>;
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pinctrl-names = "focusb_gpios";
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pinctrl-0 = <&focusb_gpio>;
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focus-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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rockchip,vcm-start-current = <20>;
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rockchip,vcm-rated-current = <76>;
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rockchip,vcm-step-mode = <0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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};
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imx415b: imx415b@1a {
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compatible = "sony,imx415";
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status = "okay";
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reg = <0x1a>;
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clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
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clock-names = "xvclk";
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power-domains = <&power RK3588_PD_VI>;
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pinctrl-names = "default", "camb_gpios";
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pinctrl-0 = <&mipim1_camera1_clk>, <&camb_gpio>;
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rockchip,grf = <&sys_grf>;
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reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
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pwdn-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2022-PX1";
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rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20";
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lens-focus = <&dw9714b>;
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port {
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imx415b_out0: endpoint {
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remote-endpoint = <&mipi_in_dcphy0>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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};
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fragment@7 {
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target = <&pinctrl>;
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__overlay__ {
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cam2 {
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camb_gpio: camb-gpio {
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rockchip,pins =
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<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
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<1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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focusb_gpio: focusb-gpio {
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rockchip,pins =
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<1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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};
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fragment@8 {
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target = <&rkcif>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@9 {
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target = <&rkcif_mmu>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@10 {
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target = <&rkisp0>;
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__overlay__ {
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status = "okay";
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};
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};
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fragment@11 {
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target = <&isp0_mmu>;
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__overlay__ {
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status = "okay";
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};
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};
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};
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