61 lines
1.4 KiB
Plaintext
61 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*
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*/
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&flexbus {
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rockchip,flexbus0-opmode = <ROCKCHIP_FLEXBUS0_OPMODE_DAC>;
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rockchip,flexbus1-opmode = <ROCKCHIP_FLEXBUS1_OPMODE_CIF>;
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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gc2145@3c {
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status = "okay";
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compatible = "galaxycore,gc2145";
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reg = <0x3c>;
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clocks = <&cru CLK_REF_OUT1>;
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clock-names = "xvclk";
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power-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&ref_clk1_pins>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CameraKing";
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rockchip,camera-module-lens-name = "Largan";
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port {
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gc2145_out: endpoint {
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remote-endpoint = <&cif_in_cam>;
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vsync-active = <0>;
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hsync-active = <1>;
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pclk-sample = <1>;
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bus-width = <8>;
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};
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};
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};
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};
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&flexbus_cif {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&flexbus1_d1_pins &flexbus1_d2_pins &flexbus1_d3_pins &flexbus1_d4_pins
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&flexbus1_d5_pins &flexbus1_d6_pins &flexbus1_d7_pins &flexbus1_d8_pins
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&flexbus1_d12_pins &flexbus1_d13_pins &flexbus1_clk_pins>;
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ports {
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port@0 {
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cif_in_cam: endpoint@0 {
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remote-endpoint = <&gc2145_out>;
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vsync-active = <0>;
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hsync-active = <1>;
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};
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};
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};
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};
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