92 lines
2.0 KiB
Plaintext
92 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/soc/rockchip-amp.h>
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#define CPU_GET_AFFINITY(cluster, cpu) (cpu)
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/ {
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cpus {
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/delete-node/ cpu@f02;
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};
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rockchip_amp: rockchip-amp {
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compatible = "rockchip,amp";
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clocks = <&cru HCLK_M0>, <&cru STCLK_M0>,
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<&cru SCLK_UART4>, <&cru PCLK_UART4>,
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<&cru PCLK_TIMER>, <&cru CLK_TIMER0_CH5>;
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pinctrl-names = "default";
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pinctrl-0 = <&rm_io27_uart4_tx>, <&rm_io28_uart4_rx>;
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amp-cpu-aff-maskbits = /bits/ 64 <0x0 0x1 0x1 0x2 0x2 0x4>;
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amp-irqs = /bits/ 64 <
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/* GPIO EXT */
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GIC_AMP_IRQ_CFG_ROUTE(35, 0xd0, CPU_GET_AFFINITY(0, 2))
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GIC_AMP_IRQ_CFG_ROUTE(39, 0xd0, CPU_GET_AFFINITY(0, 2))
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GIC_AMP_IRQ_CFG_ROUTE(43, 0xd0, CPU_GET_AFFINITY(0, 2))
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GIC_AMP_IRQ_CFG_ROUTE(47, 0xd0, CPU_GET_AFFINITY(0, 2))
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GIC_AMP_IRQ_CFG_ROUTE(51, 0xd0, CPU_GET_AFFINITY(0, 2))
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/* UART4 */
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GIC_AMP_IRQ_CFG_ROUTE(70, 0xd0, CPU_GET_AFFINITY(0, 2))
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/* MAILBOX */
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GIC_AMP_IRQ_CFG_ROUTE(176, 0xd0, CPU_GET_AFFINITY(0, 2))>;
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status = "okay";
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};
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rpmsg: rpmsg@3c00000 {
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compatible = "rockchip,rpmsg";
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mbox-names = "rpmsg-rx", "rpmsg-tx";
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mboxes = <&mailbox0 0 &mailbox2 0>;
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rockchip,vdev-nums = <1>;
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/* CPU2: link-id 0x02; */
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rockchip,link-id = <0x02>;
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reg = <0x3c00000 0x20000>;
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memory-region = <&rpmsg_dma_reserved>;
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status = "okay";
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};
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};
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&arm_pmu {
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interrupt-affinity = <&cpu0>, <&cpu1>;
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};
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&mailbox0 {
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rockchip,txpoll-period-ms = <1>;
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status = "okay";
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};
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&mailbox2 {
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rockchip,txpoll-period-ms = <1>;
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status = "okay";
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};
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&reserved_memory {
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/* remote amp core address */
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amp_shmem_reserved: amp-shmem@3b00000 {
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reg = <0x03b00000 0x100000>;
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no-map;
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};
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rpmsg_reserved: rpmsg@3c00000 {
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reg = <0x03c00000 0x100000>;
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no-map;
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};
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rpmsg_dma_reserved: rpmsg-dma@3d00000 {
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compatible = "shared-dma-pool";
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reg = <0x03d00000 0x100000>;
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no-map;
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};
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/* mcu address */
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mcu_reserved: mcu@fff80000 {
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reg = <0xfff80000 0xc000>;
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no-map;
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};
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};
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