191 lines
3.8 KiB
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/*
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
#include "rk3288-th804.dtsi"
/ {
model = "Rockchip RK3288 TH804 avb";
compatible = "rockchip,rk3288-th804", "rockchip,rk3288";
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff690000 vmalloc=496M console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0";
};
vcc_camera: vcc-camera-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&camera_pwr>;
regulator-name = "vcc_camera";
enable-active-high;
regulator-always-on;
regulator-boot-on;
};
};
&io_domains {
status = "okay";
dvp-supply = <&vcc_18>;
sdcard-supply = <&vccio_sd>;
wifi-supply = <&vccio_wl>;
};
&isp {
status = "disabled";
};
&i2c3 {
status = "okay";
gc2145: gc2145@3c {
compatible = "galaxycore,gc2145";
reg = <0x3c>;
clocks = <&cru SCLK_VIP_OUT>;
clock-names = "xvclk";
/*power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; */
pwdn-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "CameraKing";
rockchip,camera-module-lens-name = "Largan";
port {
gc2145_out: endpoint {
remote-endpoint = <&isp_dvp_in>;
};
};
};
ov8858: ov8858@36 {
compatible = "ovti,ov8858";
reg = <0x36>;
clocks = <&cru SCLK_VIP_OUT>;
clock-names = "xvclk";
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CameraKing";
rockchip,camera-module-lens-name = "Largan-9569A2";
/*power-gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; */
pwdn-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
port {
ov8858_out: endpoint {
remote-endpoint = <&th_mipi_in>;
data-lanes = <1 2>;
};
};
};
};
&mipi_phy_rx0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
th_mipi_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov8858_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dphy_rx_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp_mipi_in>;
};
};
};
};
&pinctrl {
camera {
camera_pwr: camera-pwr {
rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcfg_pull_none_4ma: pcfg-pull-none-4ma {
bias-disable;
drive-strength = <4>;
};
isp_pin {
isp_mipi: isp-mipi {
rockchip,pins =
/* cif_clkout */
<2 RK_PB3 1 &pcfg_pull_none_4ma>;
};
isp_dvp_d2d9: isp-d2d9 {
rockchip,pins =
/* cif_data2 ... cif_data9 */
<2 RK_PA0 1 &pcfg_pull_down>,
<2 RK_PA1 1 &pcfg_pull_down>,
<2 RK_PA2 1 &pcfg_pull_down>,
<2 RK_PA3 1 &pcfg_pull_down>,
<2 RK_PA4 1 &pcfg_pull_down>,
<2 RK_PA5 1 &pcfg_pull_down>,
/* cif_sync, cif_href */
<2 RK_PB0 1 &pcfg_pull_down>,
<2 RK_PB1 1 &pcfg_pull_down>,
/* cif_clkin */
<2 RK_PB2 1 &pcfg_pull_down>;
};
isp_dvp_d0d1: isp-d0d1 {
rockchip,pins =
/* cif_data0, cif_data1 */
<2 RK_PB4 1 &pcfg_pull_down>,
<2 RK_PB5 1 &pcfg_pull_down>;
};
};
};
&rkisp1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&isp_dvp_d2d9 &isp_dvp_d0d1 &isp_mipi>;
port {
#address-cells = <1>;
#size-cells = <0>;
isp_dvp_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&gc2145_out>;
};
isp_mipi_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dphy_rx_out>;
};
};
};
&vopb {
assigned-clocks = <&cru DCLK_VOP0>;
assigned-clock-parents = <&cru PLL_CPLL>;
};
&vopl {
assigned-clocks = <&cru DCLK_VOP1>;
assigned-clock-parents = <&cru PLL_GPLL>;
};