252 lines
10 KiB
Plaintext
252 lines
10 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
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#
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# (C) COPYRIGHT 2013-2024 ARM Limited. All rights reserved.
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#
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# This program is free software and is provided to you under the terms of the
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# GNU General Public License version 2 as published by the Free Software
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# Foundation, and any use by you of this program is subject to the terms
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# of such GNU license.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, you can access it online at
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# http://www.gnu.org/licenses/gpl-2.0.html.
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#
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#
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* ARM Mali Midgard / Bifrost devices
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Required properties:
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- compatible : Should be mali<chip>, replacing digits with x from the back,
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until malit<Major>xx, and it must end with one of: "arm,malit6xx" or
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"arm,mali-midgard" or "arm,mali-bifrost"
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- reg : Physical base address of the device and length of the register area.
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- interrupts : Contains the three IRQ lines required by T-6xx devices
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- interrupt-names : Contains the names of IRQ resources in the order they were
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provided in the interrupts property. Must contain: "JOB, "MMU", "GPU".
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Optional:
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- clocks : One or more pairs of phandle to clock and clock specifier
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for the Mali device. The order is important: the first clock
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shall correspond to the "clk_mali" source, while the second clock
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(that is optional) shall correspond to the "shadercores" source.
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- clock-names : Shall be set to: "clk_mali", "shadercores".
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- mali-supply : Phandle to the top level regulator for the Mali device.
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Refer to
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Documentation/devicetree/bindings/regulator/regulator.txt for details.
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- mem-supply : Phandle to memory regulator for the Mali device. This is optional.
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- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/mali-opp.txt
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for details.
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- quirks-gpu : Used to write to the JM_CONFIG or CSF_CONFIG register.
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Should be used with care. Options passed here are used to override
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certain default behavior. Note: This will override 'idvs-group-size'
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field in devicetree and module param 'corestack_driver_control',
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therefore if 'quirks-gpu' is used then 'idvs-group-size' and
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'corestack_driver_control' value should be incorporated into 'quirks-gpu'.
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- quirks-sc : Used to write to the SHADER_CONFIG register.
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Should be used with care. Options passed here are used to override
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certain default behavior.
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- quirks-tiler : Used to write to the TILER_CONFIG register.
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Should be used with care. Options passed here are used to
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disable or override certain default behavior.
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- quirks-mmu : Used to write to the L2_CONFIG register.
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Should be used with care. Options passed here are used to
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disable or override certain default behavior.
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- power-model : Sets the power model parameters. Defined power models include:
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"mali-simple-power-model", "mali-g51-power-model", "mali-g52-power-model",
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"mali-g52_r1-power-model", "mali-g71-power-model", "mali-g72-power-model",
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"mali-g76-power-model", "mali-g77-power-model", "mali-tnax-power-model",
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"mali-tbex-power-model" and "mali-tbax-power-model".
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- mali-simple-power-model: this model derives the GPU power usage based
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on the GPU voltage scaled by the system temperature. Note: it was
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designed for the Juno platform, and may not be suitable for others.
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- compatible: Should be "arm,mali-simple-power-model"
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- dynamic-coefficient: Coefficient, in pW/(Hz V^2), which is
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multiplied by v^2*f to calculate the dynamic power consumption.
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- static-coefficient: Coefficient, in uW/V^3, which is
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multiplied by v^3 to calculate the static power consumption.
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- ts: An array containing coefficients for the temperature
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scaling factor. This is used to scale the static power by a
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factor of tsf/1000000,
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where tsf = ts[3]*T^3 + ts[2]*T^2 + ts[1]*T + ts[0],
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and T = temperature in degrees.
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- thermal-zone: A string identifying the thermal zone used for
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the GPU
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- temp-poll-interval-ms: the interval at which the system
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temperature is polled
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- mali-g*-power-model(s): unless being stated otherwise, these models derive
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the GPU power usage based on performance counters, so they are more
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accurate.
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- compatible: Should be, as examples, "arm,mali-g51-power-model" /
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"arm,mali-g72-power-model".
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- scale: the dynamic power calculated by the power model is
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multiplied by a factor of 'scale'. This value should be
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chosen to match a particular implementation.
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- min_sample_cycles: Fall back to the simple power model if the
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number of GPU cycles for a given counter dump is less than
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'min_sample_cycles'. The default value of this should suffice.
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* Note: when IPA is used, two separate power models (simple and counter-based)
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are used at different points so care should be taken to configure
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both power models in the device tree (specifically dynamic-coefficient,
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static-coefficient and scale) to best match the platform.
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- power-policy : Sets the GPU power policy at probe time. Available options are
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"coarse_demand" and "always_on". If not set, then "coarse_demand" is used.
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- system-coherency : Sets the coherency protocol to be used for coherent
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accesses made from the GPU.
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If not set then no coherency is used.
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- 0 : ACE-Lite
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- 1 : ACE
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- 31 : No coherency
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- ipa-model : Sets the IPA model to be used for power management. GPU probe will fail if the
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model is not found in the registered models list. If no model is specified here,
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a gpu-id based model is picked if available, otherwise the default model is used.
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- mali-simple-power-model: Default model used on mali
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- idvs-group-size : Override the IDVS group size value. Tasks are sent to
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cores in groups of N + 1, so i.e. 0xF means 16 tasks.
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Valid values are between 0 to 0x3F (including).
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- l2-size : Override L2 cache size on GPU that supports it. Value should be larger than the minimum
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size 1KiB and smaller than the maximum size. Maximum size is Hardware integration dependent.
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The value passed should be of log2(Cache Size in Bytes).
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For example for a 1KiB of cache size, 0xa should be passed.
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- l2-hash : Override L2 hash function on GPU that supports it
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- l2-hash-values : Override L2 hash function using provided hash values, on GPUs that supports it.
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It is mutually exclusive with 'l2-hash'. Only one or the other must be
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used in a supported GPU.
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- arbiter-if : Phandle to the arbif platform device, used to provide KBASE with an interface
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to the Arbiter. This is required when using arbitration; setting to a non-NULL
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value will enable arbitration.
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If arbitration is in use, then there should be no external GPU control.
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When arbiter-if is in use then the following must not be:
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- power-model (no IPA allowed with arbitration)
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- #cooling-cells
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- operating-points-v2 (no dvfs in kbase with arbitration)
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- system-coherency with a value of 1 (no full coherency with arbitration)
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- int-id-override: list of <ID Setting[7:0]> tuples defining the IDs needed to be
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set and the setting coresponding to the SYSC_ALLOC register.
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- propagate-bits: Used to write to L2_CONFIG.PBHA_HWU. This bitset establishes which
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PBHA bits are propagated on the AXI bus.
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- mma-wa-id: Sets the PBHA ID to be used for the PBHA override based MMA violation workaround.
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The read and write allocation override bits for the PBHA are set to NONCACHEABLE
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and the driver encodes the PBHA ID in the PTEs where this workaround is to be applied.
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Valid values are from 1 to 15.
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Example for a Mali GPU with 1 clock and 1 regulator:
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gpu@0xfc010000 {
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compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
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reg = <0xfc010000 0x4000>;
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interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
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interrupt-names = "JOB", "MMU", "GPU";
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clocks = <&pclk_mali>;
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clock-names = "clk_mali";
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mali-supply = <&vdd_mali>;
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operating-points-v2 = <&gpu_opp_table>;
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power_model@0 {
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compatible = "arm,mali-simple-power-model";
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static-coefficient = <2427750>;
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dynamic-coefficient = <4687>;
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ts = <20000 2000 (-20) 2>;
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thermal-zone = "gpu";
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};
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power_model@1 {
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compatible = "arm,mali-g71-power-model";
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scale = <5>;
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};
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idvs-group-size = <0x7>;
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l2-size = /bits/ 8 <0x10>;
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l2-hash = /bits/ 8 <0x04>; /* or l2-hash-values = <0x12345678 0x8765 0xAB>; */
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};
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gpu_opp_table: opp_table0 {
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compatible = "operating-points-v2";
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opp@533000000 {
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opp-hz = /bits/ 64 <533000000>;
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opp-microvolt = <1250000>;
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};
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opp@450000000 {
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opp-hz = /bits/ 64 <450000000>;
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opp-microvolt = <1150000>;
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};
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opp@400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1125000>;
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};
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opp@350000000 {
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opp-hz = /bits/ 64 <350000000>;
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opp-microvolt = <1075000>;
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};
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opp@266000000 {
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opp-hz = /bits/ 64 <266000000>;
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opp-microvolt = <1025000>;
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};
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opp@160000000 {
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opp-hz = /bits/ 64 <160000000>;
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opp-microvolt = <925000>;
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};
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opp@100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-microvolt = <912500>;
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};
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};
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Example for a Mali GPU with 2 clocks and 2 regulators:
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gpu: gpu@6e000000 {
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compatible = "arm,mali-midgard";
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reg = <0x0 0x6e000000 0x0 0x200000>;
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interrupts = <0 168 4>, <0 168 4>, <0 168 4>;
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interrupt-names = "JOB", "MMU", "GPU";
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clocks = <&clk_mali 0>, <&clk_mali 1>;
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clock-names = "clk_mali", "shadercores";
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mali-supply = <&supply0_3v3>;
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mem-supply = <&supply1_3v3>;
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system-coherency = <31>;
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operating-points-v2 = <&gpu_opp_table>;
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};
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gpu_opp_table: opp_table0 {
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compatible = "operating-points-v2", "operating-points-v2-mali";
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opp@0 {
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opp-hz = /bits/ 64 <50000000>;
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opp-hz-real = /bits/ 64 <50000000>, /bits/ 64 <45000000>;
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opp-microvolt = <820000>, <800000>;
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opp-core-mask = /bits/ 64 <0xf>;
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};
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opp@1 {
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opp-hz = /bits/ 64 <40000000>;
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opp-hz-real = /bits/ 64 <40000000>, /bits/ 64 <35000000>;
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opp-microvolt = <720000>, <700000>;
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opp-core-mask = /bits/ 64 <0x7>;
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};
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opp@2 {
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opp-hz = /bits/ 64 <30000000>;
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opp-hz-real = /bits/ 64 <30000000>, /bits/ 64 <25000000>;
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opp-microvolt = <620000>, <700000>;
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opp-core-mask = /bits/ 64 <0x3>;
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};
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};
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Example for a Mali GPU supporting PBHA configuration via DTB (default):
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gpu@0xfc010000 {
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...
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pbha {
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int-id-override = <2 0x32>, <9 0x05>, <16 0x32>;
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propagate-bits = /bits/ 8 <0x03>;
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mma-wa-id = <2>;
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};
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...
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};
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