600 lines
18 KiB
C
600 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* techpoint lib
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*
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* Copyright (C) 2023 Rockchip Electronics Co., Ltd.
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*/
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#include "techpoint_tp2855.h"
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#include "techpoint_dev.h"
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static __maybe_unused const struct regval common_setting_297M_720p_regs[] = {
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{ 0x40, 0x08 },
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{ 0x01, 0xf0 },
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{ 0x02, 0x01 },
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{ 0x08, 0x0f },
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{ 0x20, 0x44 },
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{ 0x34, 0xe4 },
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{ 0x14, 0x44 },
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{ 0x15, 0x0d },
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{ 0x25, 0x04 },
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{ 0x26, 0x03 },
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{ 0x27, 0x09 },
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{ 0x29, 0x02 },
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{ 0x33, 0x07 },
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{ 0x33, 0x00 },
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{ 0x14, 0xc4 },
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{ 0x14, 0x44 },
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// {0x23, 0x02}, //vi test ok
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// {0x23, 0x00},
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};
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static __maybe_unused const struct regval common_setting_594M_1080p_regs[] = {
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{ 0x40, 0x08 },
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{ 0x01, 0xf0 },
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{ 0x02, 0x01 },
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{ 0x08, 0x0f },
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{ 0x20, 0x44 },
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{ 0x34, 0xe4 },
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{ 0x15, 0x0C },
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{ 0x25, 0x08 },
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{ 0x26, 0x06 },
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{ 0x27, 0x11 },
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{ 0x29, 0x0a },
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{ 0x33, 0x07 },
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{ 0x33, 0x00 },
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{ 0x14, 0x33 },
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{ 0x14, 0xb3 },
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{ 0x14, 0x33 },
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// {0x23, 0x02}, //vi test ok
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// {0x23, 0x00},
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};
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static __maybe_unused const struct regval common_setting_594M_720p_1chn_2lane_regs[] = {
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{0x40, 0x08},
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{0x01, 0xf0},
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{0x02, 0x01},
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{0x08, 0x0f},
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{0x20, 0x12},
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{0x34, 0x10}, //output vin1&vin2
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{0x15, 0x0c},
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{0x25, 0x08},
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{0x26, 0x06},
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{0x27, 0x11},
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{0x29, 0x0a},
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{0x33, 0x07},
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{0x33, 0x00},
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{0x14, 0x43},
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{0x14, 0xc3},
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{0x14, 0x43},
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{0x23, 0x02}, //vi test ok
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{0x23, 0x00},
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};
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static __maybe_unused const struct regval common_setting_594M_4ch_2lane_720p_25fps_regs[] = {
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{ 0x40, 0x08 },
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{ 0x01, 0xf0 },
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{ 0x02, 0x01 },
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{ 0x08, 0x0f },
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{0x20, 0x42},
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{0x34, 0xe4}, //output vin1&vin2
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{0x15, 0x0c},
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{0x25, 0x08},
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{0x26, 0x06},
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{0x27, 0x11},
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{0x29, 0x0a},
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{0x33, 0x07},
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{0x33, 0x00},
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{0x14, 0x43},
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{0x14, 0xc3},
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{0x14, 0x43},
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{0x23, 0x02},
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{0x23, 0x00},
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};
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static struct techpoint_video_modes supported_modes[] = {
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{// 4CH 2lane 720p
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.bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
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.width = 1280,
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.height = 720,
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.max_fps = {
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.numerator = 10000,
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.denominator = 250000,
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},
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.link_freq_value = TP2855_LINK_FREQ_594M,
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.common_reg_list = common_setting_594M_4ch_2lane_720p_25fps_regs,
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.common_reg_size = ARRAY_SIZE(common_setting_594M_4ch_2lane_720p_25fps_regs),
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.bpp = 8,
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.lane = 2,
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.vc[PAD0] = 0,
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.vc[PAD1] = 1,
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.vc[PAD2] = 2,
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.vc[PAD3] = 3,
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},
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{//1 chn 2 lane 720p
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.bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
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.width = 1280,
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.height = 720,
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.max_fps = {
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.numerator = 10000,
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.denominator = 300000,
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},
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.link_freq_value = TP2855_LINK_FREQ_594M,
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.common_reg_list = common_setting_594M_720p_1chn_2lane_regs,
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.common_reg_size = ARRAY_SIZE(common_setting_594M_720p_1chn_2lane_regs),
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.bpp = 8,
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.lane = 2,
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.vc[PAD0] = 0,
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},
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{//4 chn 4 lane 1080p
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.bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
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.width = 1920,
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.height = 1080,
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.max_fps = {
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.numerator = 10000,
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.denominator = 250000,
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},
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.link_freq_value = TP2855_LINK_FREQ_594M,
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.common_reg_list = common_setting_594M_1080p_regs,
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.common_reg_size = ARRAY_SIZE(common_setting_594M_1080p_regs),
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.bpp = 8,
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.lane = 4,
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.vc[PAD0] = 0,
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.vc[PAD1] = 1,
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.vc[PAD2] = 2,
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.vc[PAD3] = 3,
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},
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{//4 chn 4 lane 720p
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.bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
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.width = 1280,
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.height = 720,
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.max_fps = {
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.numerator = 10000,
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.denominator = 250000,
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},
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.link_freq_value = TP2855_LINK_FREQ_297M,
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.common_reg_list = common_setting_297M_720p_regs,
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.common_reg_size = ARRAY_SIZE(common_setting_297M_720p_regs),
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.bpp = 8,
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.lane = 4,
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.vc[PAD0] = 0,
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.vc[PAD1] = 1,
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.vc[PAD2] = 2,
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.vc[PAD3] = 3,
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},
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{//4 chn 4 lane 576p
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.bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
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.width = 720,
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.height = 576,
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.max_fps = {
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.numerator = 10000,
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.denominator = 250000,
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},
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.link_freq_value = TP2855_LINK_FREQ_297M,
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.common_reg_list = common_setting_297M_720p_regs,
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.common_reg_size = ARRAY_SIZE(common_setting_297M_720p_regs),
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.bpp = 8,
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.lane = 4,
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.vc[PAD0] = 0,
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.vc[PAD1] = 1,
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.vc[PAD2] = 2,
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.vc[PAD3] = 3,
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},
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};
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int tp2855_initialize(struct techpoint *techpoint)
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{
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int array_size = 0;
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struct i2c_client *client = techpoint->client;
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struct device *dev = &client->dev;
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techpoint->video_modes_num = ARRAY_SIZE(supported_modes);
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array_size =
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sizeof(struct techpoint_video_modes) * techpoint->video_modes_num;
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techpoint->video_modes = devm_kzalloc(dev, array_size, GFP_KERNEL);
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memcpy(techpoint->video_modes, supported_modes, array_size);
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techpoint->cur_video_mode = &techpoint->video_modes[0];
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return 0;
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}
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int tp2855_get_channel_input_status(struct techpoint *techpoint, u8 ch)
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{
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struct i2c_client *client = techpoint->client;
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u8 val = 0;
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mutex_lock(&techpoint->mutex);
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techpoint_write_reg(client, PAGE_REG, ch);
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techpoint_read_reg(client, INPUT_STATUS_REG, &val);
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mutex_unlock(&techpoint->mutex);
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dev_dbg(&client->dev, "input_status ch %d : %x\n", ch, val);
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return (val & INPUT_STATUS_MASK) ? 0 : 1;
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}
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int tp2855_get_all_input_status(struct techpoint *techpoint, u8 *detect_status)
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{
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struct i2c_client *client = techpoint->client;
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u8 val = 0, i;
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for (i = 0; i < PAD_MAX; i++) {
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techpoint_write_reg(client, PAGE_REG, i);
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techpoint_read_reg(client, INPUT_STATUS_REG, &val);
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detect_status[i] = tp2855_get_channel_input_status(techpoint, i);
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}
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return 0;
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}
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int tp2855_set_channel_reso(struct i2c_client *client, int ch,
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enum techpoint_support_reso reso)
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{
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int val = reso;
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u8 tmp;
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const unsigned char SYS_MODE[5] = { 0x01, 0x02, 0x04, 0x08, 0x0f };
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techpoint_write_reg(client, 0x40, ch);
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switch (val) {
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case TECHPOINT_S_RESO_1080P_30:
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dev_info(&client->dev, "set channel %d 1080P_30, TBD\n", ch);
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techpoint_read_reg(client, 0xf5, &tmp);
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tmp &= ~SYS_MODE[ch];
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techpoint_write_reg(client, 0xf5, tmp);
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techpoint_write_reg(client, 0x02, 0x40);
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techpoint_write_reg(client, 0x07, 0xc0);
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techpoint_write_reg(client, 0x0b, 0xc0);
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techpoint_write_reg(client, 0x0c, 0x03);
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techpoint_write_reg(client, 0x0d, 0x50);
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techpoint_write_reg(client, 0x15, 0x03);
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techpoint_write_reg(client, 0x16, 0xd2);
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techpoint_write_reg(client, 0x17, 0x80);
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techpoint_write_reg(client, 0x18, 0x29);
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techpoint_write_reg(client, 0x19, 0x38);
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techpoint_write_reg(client, 0x1a, 0x47);
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techpoint_write_reg(client, 0x1c, 0x08);
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techpoint_write_reg(client, 0x1d, 0x98);
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techpoint_write_reg(client, 0x20, 0x30);
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techpoint_write_reg(client, 0x21, 0x84);
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techpoint_write_reg(client, 0x22, 0x36);
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techpoint_write_reg(client, 0x23, 0x3c);
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techpoint_write_reg(client, 0x2b, 0x60);
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techpoint_write_reg(client, 0x2c, 0x0a);
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techpoint_write_reg(client, 0x2d, 0x30);
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techpoint_write_reg(client, 0x2e, 0x70);
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techpoint_write_reg(client, 0x30, 0x48);
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techpoint_write_reg(client, 0x31, 0xbb);
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techpoint_write_reg(client, 0x32, 0x2e);
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techpoint_write_reg(client, 0x33, 0x90);
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techpoint_write_reg(client, 0x35, 0x05);
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techpoint_write_reg(client, 0x38, 0x00);
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techpoint_write_reg(client, 0x39, 0x1C);
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//def ahd config
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techpoint_write_reg(client, 0x02, 0x44);
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techpoint_write_reg(client, 0x0d, 0x72);
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techpoint_write_reg(client, 0x15, 0x01);
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techpoint_write_reg(client, 0x16, 0xf0);
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techpoint_write_reg(client, 0x20, 0x38);
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techpoint_write_reg(client, 0x21, 0x46);
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techpoint_write_reg(client, 0x25, 0xfe);
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techpoint_write_reg(client, 0x26, 0x0d);
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techpoint_write_reg(client, 0x2c, 0x3a);
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techpoint_write_reg(client, 0x2d, 0x54);
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techpoint_write_reg(client, 0x2e, 0x40);
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techpoint_write_reg(client, 0x30, 0xa5);
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techpoint_write_reg(client, 0x31, 0x95);
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techpoint_write_reg(client, 0x32, 0xe0);
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techpoint_write_reg(client, 0x33, 0x60);
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break;
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case TECHPOINT_S_RESO_1080P_25:
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dev_info(&client->dev, "set channel %d 1080P_25\n", ch);
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techpoint_read_reg(client, 0xf5, &tmp);
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tmp &= ~SYS_MODE[ch];
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techpoint_write_reg(client, 0xf5, tmp);
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techpoint_write_reg(client, 0x02, 0x40);
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techpoint_write_reg(client, 0x07, 0xc0);
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techpoint_write_reg(client, 0x0b, 0xc0);
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techpoint_write_reg(client, 0x0c, 0x03);
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techpoint_write_reg(client, 0x0d, 0x50);
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techpoint_write_reg(client, 0x15, 0x03);
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techpoint_write_reg(client, 0x16, 0xd2);
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techpoint_write_reg(client, 0x17, 0x80);
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techpoint_write_reg(client, 0x18, 0x29);
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techpoint_write_reg(client, 0x19, 0x38);
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techpoint_write_reg(client, 0x1a, 0x47);
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techpoint_write_reg(client, 0x1c, 0x0a);
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techpoint_write_reg(client, 0x1d, 0x50);
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techpoint_write_reg(client, 0x20, 0x30);
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techpoint_write_reg(client, 0x21, 0x84);
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techpoint_write_reg(client, 0x22, 0x36);
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techpoint_write_reg(client, 0x23, 0x3c);
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techpoint_write_reg(client, 0x2b, 0x60);
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techpoint_write_reg(client, 0x2c, 0x0a);
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techpoint_write_reg(client, 0x2d, 0x30);
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techpoint_write_reg(client, 0x2e, 0x70);
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techpoint_write_reg(client, 0x30, 0x48);
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techpoint_write_reg(client, 0x31, 0xbb);
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techpoint_write_reg(client, 0x32, 0x2e);
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techpoint_write_reg(client, 0x33, 0x90);
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techpoint_write_reg(client, 0x35, 0x05);
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techpoint_write_reg(client, 0x38, 0x00);
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techpoint_write_reg(client, 0x39, 0x1C);
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//def ahd config
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techpoint_write_reg(client, 0x02, 0x44);
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techpoint_write_reg(client, 0x0d, 0x73);
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techpoint_write_reg(client, 0x15, 0x01);
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techpoint_write_reg(client, 0x16, 0xf0);
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techpoint_write_reg(client, 0x20, 0x3c);
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techpoint_write_reg(client, 0x21, 0x46);
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techpoint_write_reg(client, 0x25, 0xfe);
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techpoint_write_reg(client, 0x26, 0x0d);
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techpoint_write_reg(client, 0x2c, 0x3a);
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techpoint_write_reg(client, 0x2d, 0x54);
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techpoint_write_reg(client, 0x2e, 0x40);
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techpoint_write_reg(client, 0x30, 0xa5);
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techpoint_write_reg(client, 0x31, 0x86);
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techpoint_write_reg(client, 0x32, 0xfb);
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techpoint_write_reg(client, 0x33, 0x60);
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break;
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case TECHPOINT_S_RESO_720P_30:
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dev_info(&client->dev, "set channel %d 720P_30\n", ch);
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techpoint_read_reg(client, 0xf5, &tmp);
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tmp |= SYS_MODE[ch];
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techpoint_write_reg(client, 0xf5, tmp);
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techpoint_write_reg(client, 0x02, 0x42);
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techpoint_write_reg(client, 0x07, 0xc0);
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techpoint_write_reg(client, 0x0b, 0xc0);
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techpoint_write_reg(client, 0x0c, 0x13);
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techpoint_write_reg(client, 0x0d, 0x50);
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techpoint_write_reg(client, 0x15, 0x13);
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techpoint_write_reg(client, 0x16, 0x15);
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techpoint_write_reg(client, 0x17, 0x00);
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techpoint_write_reg(client, 0x18, 0x19);
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techpoint_write_reg(client, 0x19, 0xd0);
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techpoint_write_reg(client, 0x1a, 0x25);
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techpoint_write_reg(client, 0x1c, 0x06);
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techpoint_write_reg(client, 0x1d, 0x72);
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techpoint_write_reg(client, 0x20, 0x30);
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techpoint_write_reg(client, 0x21, 0x84);
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techpoint_write_reg(client, 0x22, 0x36);
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techpoint_write_reg(client, 0x23, 0x3c);
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techpoint_write_reg(client, 0x2b, 0x60);
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techpoint_write_reg(client, 0x2c, 0x0a);
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techpoint_write_reg(client, 0x2d, 0x30);
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techpoint_write_reg(client, 0x2e, 0x70);
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techpoint_write_reg(client, 0x30, 0x48);
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techpoint_write_reg(client, 0x31, 0xbb);
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techpoint_write_reg(client, 0x32, 0x2e);
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techpoint_write_reg(client, 0x33, 0x90);
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techpoint_write_reg(client, 0x35, 0x25);
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techpoint_write_reg(client, 0x38, 0x00);
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techpoint_write_reg(client, 0x39, 0x18);
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//def ahd config
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techpoint_write_reg(client, 0x02, 0x46);
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techpoint_write_reg(client, 0x0d, 0x70);
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techpoint_write_reg(client, 0x20, 0x40);
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techpoint_write_reg(client, 0x21, 0x46);
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techpoint_write_reg(client, 0x25, 0xfe);
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techpoint_write_reg(client, 0x26, 0x01);
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techpoint_write_reg(client, 0x2c, 0x3a);
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techpoint_write_reg(client, 0x2d, 0x5a);
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techpoint_write_reg(client, 0x2e, 0x40);
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techpoint_write_reg(client, 0x30, 0x9d);
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techpoint_write_reg(client, 0x31, 0xca);
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techpoint_write_reg(client, 0x32, 0x01);
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techpoint_write_reg(client, 0x33, 0xd0);
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break;
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case TECHPOINT_S_RESO_720P_25:
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dev_info(&client->dev, "set channel %d 720P_25\n", ch);
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techpoint_read_reg(client, 0xf5, &tmp);
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tmp |= SYS_MODE[ch];
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techpoint_write_reg(client, 0xf5, tmp);
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techpoint_write_reg(client, 0x02, 0x42);
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techpoint_write_reg(client, 0x07, 0xc0);
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techpoint_write_reg(client, 0x0b, 0xc0);
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techpoint_write_reg(client, 0x0c, 0x13);
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techpoint_write_reg(client, 0x0d, 0x50);
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techpoint_write_reg(client, 0x15, 0x13);
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techpoint_write_reg(client, 0x16, 0x15);
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techpoint_write_reg(client, 0x17, 0x00);
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techpoint_write_reg(client, 0x18, 0x19);
|
|
techpoint_write_reg(client, 0x19, 0xd0);
|
|
techpoint_write_reg(client, 0x1a, 0x25);
|
|
techpoint_write_reg(client, 0x1c, 0x07);
|
|
techpoint_write_reg(client, 0x1d, 0xbc);
|
|
techpoint_write_reg(client, 0x20, 0x30);
|
|
techpoint_write_reg(client, 0x21, 0x84);
|
|
techpoint_write_reg(client, 0x22, 0x36);
|
|
techpoint_write_reg(client, 0x23, 0x3c);
|
|
techpoint_write_reg(client, 0x2b, 0x60);
|
|
techpoint_write_reg(client, 0x2c, 0x0a);
|
|
techpoint_write_reg(client, 0x2d, 0x30);
|
|
techpoint_write_reg(client, 0x2e, 0x70);
|
|
techpoint_write_reg(client, 0x30, 0x48);
|
|
techpoint_write_reg(client, 0x31, 0xbb);
|
|
techpoint_write_reg(client, 0x32, 0x2e);
|
|
techpoint_write_reg(client, 0x33, 0x90);
|
|
techpoint_write_reg(client, 0x35, 0x25);
|
|
techpoint_write_reg(client, 0x38, 0x00);
|
|
techpoint_write_reg(client, 0x39, 0x18);
|
|
//def ahd config
|
|
techpoint_write_reg(client, 0x02, 0x46);
|
|
techpoint_write_reg(client, 0x0d, 0x71);
|
|
techpoint_write_reg(client, 0x20, 0x40);
|
|
techpoint_write_reg(client, 0x21, 0x46);
|
|
techpoint_write_reg(client, 0x25, 0xfe);
|
|
techpoint_write_reg(client, 0x26, 0x01);
|
|
techpoint_write_reg(client, 0x2c, 0x3a);
|
|
techpoint_write_reg(client, 0x2d, 0x5a);
|
|
techpoint_write_reg(client, 0x2e, 0x40);
|
|
techpoint_write_reg(client, 0x30, 0x9e);
|
|
techpoint_write_reg(client, 0x31, 0x20);
|
|
techpoint_write_reg(client, 0x32, 0x10);
|
|
techpoint_write_reg(client, 0x33, 0x90);
|
|
break;
|
|
case TECHPOINT_S_RESO_SD:
|
|
dev_info(&client->dev, "set channel %d SD\n", ch);
|
|
techpoint_read_reg(client, 0xf5, &tmp);
|
|
tmp |= SYS_MODE[ch];
|
|
techpoint_write_reg(client, 0xf5, tmp);
|
|
techpoint_write_reg(client, 0x06, 0x32);
|
|
techpoint_write_reg(client, 0x02, 0x47);
|
|
techpoint_write_reg(client, 0x07, 0x80);
|
|
techpoint_write_reg(client, 0x0b, 0x80);
|
|
techpoint_write_reg(client, 0x0c, 0x13);
|
|
techpoint_write_reg(client, 0x0d, 0x51);
|
|
techpoint_write_reg(client, 0x15, 0x13);
|
|
techpoint_write_reg(client, 0x16, 0x18);
|
|
techpoint_write_reg(client, 0x17, 0xa0);
|
|
techpoint_write_reg(client, 0x18, 0x17);
|
|
techpoint_write_reg(client, 0x19, 0x20);
|
|
techpoint_write_reg(client, 0x1a, 0x15);
|
|
techpoint_write_reg(client, 0x1c, 0x06);
|
|
techpoint_write_reg(client, 0x1d, 0xf0);
|
|
techpoint_write_reg(client, 0x20, 0x48);
|
|
techpoint_write_reg(client, 0x21, 0x84);
|
|
techpoint_write_reg(client, 0x22, 0x37);
|
|
techpoint_write_reg(client, 0x23, 0x3f);
|
|
techpoint_write_reg(client, 0x2b, 0x70);
|
|
techpoint_write_reg(client, 0x2c, 0x2a);
|
|
techpoint_write_reg(client, 0x2d, 0x4b);
|
|
techpoint_write_reg(client, 0x2e, 0x56);
|
|
techpoint_write_reg(client, 0x30, 0x7a);
|
|
techpoint_write_reg(client, 0x31, 0x4a);
|
|
techpoint_write_reg(client, 0x32, 0x4d);
|
|
techpoint_write_reg(client, 0x33, 0xfb);
|
|
techpoint_write_reg(client, 0x35, 0x65);
|
|
techpoint_write_reg(client, 0x38, 0x00);
|
|
techpoint_write_reg(client, 0x39, 0x04);
|
|
break;
|
|
default:
|
|
dev_info(&client->dev,
|
|
"set channel %d is not supported, default 1080P_25\n", ch);
|
|
techpoint_read_reg(client, 0xf5, &tmp);
|
|
tmp &= ~SYS_MODE[ch];
|
|
techpoint_write_reg(client, 0xf5, tmp);
|
|
techpoint_write_reg(client, 0x02, 0x40);
|
|
techpoint_write_reg(client, 0x07, 0xc0);
|
|
techpoint_write_reg(client, 0x0b, 0xc0);
|
|
techpoint_write_reg(client, 0x0c, 0x03);
|
|
techpoint_write_reg(client, 0x0d, 0x50);
|
|
techpoint_write_reg(client, 0x15, 0x03);
|
|
techpoint_write_reg(client, 0x16, 0xd2);
|
|
techpoint_write_reg(client, 0x17, 0x80);
|
|
techpoint_write_reg(client, 0x18, 0x29);
|
|
techpoint_write_reg(client, 0x19, 0x38);
|
|
techpoint_write_reg(client, 0x1a, 0x47);
|
|
techpoint_write_reg(client, 0x1c, 0x0a);
|
|
techpoint_write_reg(client, 0x1d, 0x50);
|
|
techpoint_write_reg(client, 0x20, 0x30);
|
|
techpoint_write_reg(client, 0x21, 0x84);
|
|
techpoint_write_reg(client, 0x22, 0x36);
|
|
techpoint_write_reg(client, 0x23, 0x3c);
|
|
techpoint_write_reg(client, 0x2b, 0x60);
|
|
techpoint_write_reg(client, 0x2c, 0x0a);
|
|
techpoint_write_reg(client, 0x2d, 0x30);
|
|
techpoint_write_reg(client, 0x2e, 0x70);
|
|
techpoint_write_reg(client, 0x30, 0x48);
|
|
techpoint_write_reg(client, 0x31, 0xbb);
|
|
techpoint_write_reg(client, 0x32, 0x2e);
|
|
techpoint_write_reg(client, 0x33, 0x90);
|
|
techpoint_write_reg(client, 0x35, 0x05);
|
|
techpoint_write_reg(client, 0x38, 0x00);
|
|
techpoint_write_reg(client, 0x39, 0x1C);
|
|
//def ahd config
|
|
techpoint_write_reg(client, 0x02, 0x44);
|
|
techpoint_write_reg(client, 0x0d, 0x73);
|
|
techpoint_write_reg(client, 0x15, 0x01);
|
|
techpoint_write_reg(client, 0x16, 0xf0);
|
|
techpoint_write_reg(client, 0x20, 0x3c);
|
|
techpoint_write_reg(client, 0x21, 0x46);
|
|
techpoint_write_reg(client, 0x25, 0xfe);
|
|
techpoint_write_reg(client, 0x26, 0x0d);
|
|
techpoint_write_reg(client, 0x2c, 0x3a);
|
|
techpoint_write_reg(client, 0x2d, 0x54);
|
|
techpoint_write_reg(client, 0x2e, 0x40);
|
|
techpoint_write_reg(client, 0x30, 0xa5);
|
|
techpoint_write_reg(client, 0x31, 0x86);
|
|
techpoint_write_reg(client, 0x32, 0xfb);
|
|
techpoint_write_reg(client, 0x33, 0x60);
|
|
break;
|
|
}
|
|
|
|
#if TECHPOINT_TEST_PATTERN
|
|
techpoint_write_reg(client, 0x2a, 0x3c);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
int tp2855_get_channel_reso(struct i2c_client *client, int ch)
|
|
{
|
|
u8 detect_fmt = 0xff;
|
|
u8 reso = 0xff;
|
|
|
|
techpoint_write_reg(client, 0x40, ch);
|
|
techpoint_read_reg(client, 0x03, &detect_fmt);
|
|
reso = detect_fmt & 0x7;
|
|
|
|
switch (reso) {
|
|
case TP2855_CVSTD_1080P_30:
|
|
dev_err(&client->dev, "detect channel %d 1080P_30\n", ch);
|
|
return TECHPOINT_S_RESO_1080P_30;
|
|
case TP2855_CVSTD_1080P_25:
|
|
dev_err(&client->dev, "detect channel %d 1080P_25\n", ch);
|
|
return TECHPOINT_S_RESO_1080P_25;
|
|
case TP2855_CVSTD_720P_30:
|
|
dev_err(&client->dev, "detect channel %d 720P_30\n", ch);
|
|
return TECHPOINT_S_RESO_720P_30;
|
|
case TP2855_CVSTD_720P_25:
|
|
dev_err(&client->dev, "detect channel %d 720P_25\n", ch);
|
|
return TECHPOINT_S_RESO_720P_25;
|
|
case TP2855_CVSTD_SD:
|
|
dev_err(&client->dev, "detect channel %d SD\n", ch);
|
|
return TECHPOINT_S_RESO_SD;
|
|
default:
|
|
dev_err(&client->dev,
|
|
"detect channel %d is not supported, default 1080P_25\n", ch);
|
|
return TECHPOINT_S_RESO_1080P_25;
|
|
}
|
|
|
|
return reso;
|
|
}
|
|
|
|
int tp2855_set_decoder_mode(struct i2c_client *client, int ch, int status)
|
|
{
|
|
u8 val = 0;
|
|
|
|
techpoint_write_reg(client, PAGE_REG, ch);
|
|
techpoint_read_reg(client, 0x26, &val);
|
|
if (status)
|
|
val |= 0x1;
|
|
else
|
|
val &= ~0x1;
|
|
techpoint_write_reg(client, 0x26, val);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int tp2855_set_quick_stream(struct techpoint *techpoint, u32 stream)
|
|
{
|
|
struct i2c_client *client = techpoint->client;
|
|
|
|
mutex_lock(&techpoint->mutex);
|
|
if (stream) {
|
|
techpoint_write_reg(client, 0x40, 0x8);
|
|
techpoint_write_reg(client, 0x23, 0x0);
|
|
} else {
|
|
techpoint_write_reg(client, 0x40, 0x8);
|
|
techpoint_write_reg(client, 0x23, 0x2);
|
|
usleep_range(40 * 1000, 50 * 1000);
|
|
}
|
|
mutex_unlock(&techpoint->mutex);
|
|
|
|
return 0;
|
|
}
|