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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
*/
#include "rk356x.dtsi"
/ {
compatible = "rockchip,rk3566";
};
&lpddr4_params {
/* freq info, freq_0 is final frequency, unit: MHz */
freq_0 = <1056>;
};
&lpddr4x_params {
/* freq info, freq_0 is final frequency, unit: MHz */
freq_0 = <1056>;
};
&pipegrf {
compatible = "rockchip,rk3566-pipe-grf", "syscon";
};
&power {
power-domain@RK3568_PD_PIPE {
reg = <RK3568_PD_PIPE>;
clocks = <&cru PCLK_PIPE>;
pm_qos = <&qos_pcie2x1>,
<&qos_sata1>,
<&qos_sata2>,
<&qos_usb3_0>,
<&qos_usb3_1>;
#power-domain-cells = <0>;
};
};
&rkisp {
rockchip,iq-feature = /bits/ 64 <0x1BFBF7FE67FF>;
};
&usbdrd_dwc3 {
phys = <&u2phy0_otg>;
phy-names = "usb2-phy";
extcon = <&usb2phy0>;
maximum-speed = "high-speed";
snps,dis_u2_susphy_quirk;
snps,usb2-lpm-disable;
};