911 lines
17 KiB
Plaintext
911 lines
17 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3576-evb.dtsi"
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#include "rk3576-rk806.dtsi"
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/ {
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panel-edp {
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compatible = "simple-panel";
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backlight = <&backlight>;
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power-supply = <&vcc3v3_lcd_n>;
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prepare-delay-ms = <120>;
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enable-delay-ms = <120>;
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unprepare-delay-ms = <120>;
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disable-delay-ms = <120>;
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width-mm = <120>;
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height-mm = <160>;
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status = "okay";
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panel-timing {
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clock-frequency = <200000000>;
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hactive = <1536>;
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vactive = <2048>;
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hfront-porch = <12>;
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hsync-len = <16>;
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hback-porch = <48>;
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vfront-porch = <8>;
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vsync-len = <4>;
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vback-porch = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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port {
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panel_in_edp: endpoint {
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remote-endpoint = <&edp_out_panel>;
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};
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_poweren_gpio>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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post-power-on-delay-ms = <200>;
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reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
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};
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vcc_1v8_s0: vcc-1v8-s0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8_s0";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc_1v8_s3>;
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};
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vcc_3v3_s0: vcc-3v3-s0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_s0";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3_s3>;
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};
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vcc_ufs_s0: vcc-ufs-s0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_ufs_s0";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_sys>;
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};
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vcc1v8_ufs_vccq2_s0: vcc1v8-ufs-vccq2-s0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v8_ufs_vccq2_s0";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc_1v8_s3>;
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};
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vcc1v2_ufs_vccq_s0: vcc1v2-ufs-vccq-s0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v2_ufs_vccq_s0";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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vin-supply = <&vcc_sys>;
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};
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vcc3v3_dp: vcc3v3-dp {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_dp";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc_3v3_s3>;
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};
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vcc3v3_lcd_n: vcc3v3-lcd0-n {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_lcd0_n";
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc_3v3_s0>;
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};
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vcc5v0_host: vcc5v0-host {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_device>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_host_pwren>;
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};
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vcc5v0_otg: vcc5v0-otg {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_device>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_otg0_pwren>;
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};
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};
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&backlight {
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pwms = <&pwm1_6ch_1 0 25000 0>;
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power-supply = <&vcc3v3_lcd_n>;
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status = "okay";
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};
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_psu {
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status = "okay";
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};
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&dp {
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pinctrl-0 = <&dpm0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&dp0 {
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status = "okay";
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};
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&dp0_in_vp0 {
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status = "okay";
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};
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/*
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* mipidcphy0 needs to be enabled
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* when dsi is enabled
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*/
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&dsi {
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status = "disabled";
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};
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&dsi_panel {
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_rst_gpio>;
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power-supply = <&vcc3v3_lcd_n>;
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reset-gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_LOW>;
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phy-c-option;
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dsi,lanes = <3>;
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status = "disabled";
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panel-init-sequence = [
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23 00 02 FF 20
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23 00 02 FB 01
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23 00 02 05 D9
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/* VGH=17V */
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23 00 02 07 78
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/* VGL=-14V */
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23 00 02 08 5A
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/* EN_VMODGATE2=1 */
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23 00 02 0D 63
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/* VGH=16V */
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23 00 02 0E 91
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/* VGL=-13V */
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23 00 02 0F 73
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/* GVDD=5.2V */
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23 00 02 95 EB
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23 00 02 96 EB
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/* Disable VDDI LV */
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23 00 02 30 11
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/* ISOP */
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23 00 02 6D 66
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/* EN_GMACP */
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23 00 02 75 A2
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/* V128 */
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23 00 02 77 3B
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/* R(+) */
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29 00 11 B0 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9
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29 00 11 B1 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31
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29 00 11 B2 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B
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29 00 0D B3 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF
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/* G(+) */
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29 00 11 B4 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9
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29 00 11 B5 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31
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29 00 11 B6 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B
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29 00 0D B7 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF
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/* B(+) */
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29 00 11 B8 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9
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29 00 11 B9 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31
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29 00 11 BA 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B
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29 00 0D BB 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF
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/* CMD2_Page1 */
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23 00 02 FF 21
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23 00 02 FB 01
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/* R(-) */
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29 00 11 B0 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1
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29 00 11 B1 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29
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29 00 11 B2 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73
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29 00 0D B3 03 86 03 9A 03 AF 03 DF 03 F5 03 F7
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/* G(-) */
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29 00 11 B4 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1
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29 00 11 B5 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29
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29 00 11 B6 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73
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29 00 0D B7 03 86 03 9A 03 AF 03 DF 03 F5 03 F7
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/* B(-) */
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29 00 11 B8 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1
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29 00 11 B9 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29
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29 00 11 BA 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73
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29 00 0D BB 03 86 03 9A 03 AF 03 DF 03 F5 03 F7
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29 00 02 FF 24
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29 00 02 FB 01
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/* VGL */
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29 00 02 00 00
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29 00 02 01 00
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/* VDDO */
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29 00 02 02 1C
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29 00 02 03 1C
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/* VDDE */
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29 00 02 04 1D
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29 00 02 05 1D
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/* STV0 */
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29 00 02 06 04
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29 00 02 07 04
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/* CLK8 */
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29 00 02 08 0F
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29 00 02 09 0F
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/* CLK6 */
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29 00 02 0A 0E
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29 00 02 0B 0E
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/* CLK4 */
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29 00 02 0C 0D
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29 00 02 0D 0D
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/* CLK2 */
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29 00 02 0E 0C
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29 00 02 0F 0C
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/* STV2 */
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29 00 02 10 08
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29 00 02 11 08
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29 00 02 12 00
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29 00 02 13 00
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29 00 02 14 00
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29 00 02 15 00
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/* VGL */
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29 00 02 16 00
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29 00 02 17 00
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/* VDDO */
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29 00 02 18 1C
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29 00 02 19 1C
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/* VDDE */
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29 00 02 1A 1D
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29 00 02 1B 1D
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/* STV0 */
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29 00 02 1C 04
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29 00 02 1D 04
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/* CLK7 */
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29 00 02 1E 0F
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29 00 02 1F 0F
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/* CLK5 */
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29 00 02 20 0E
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29 00 02 21 0E
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/* CLK3 */
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29 00 02 22 0D
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29 00 02 23 0D
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/* CLK1 */
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29 00 02 24 0C
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29 00 02 25 0C
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/* STV1 */
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29 00 02 26 08
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29 00 02 27 08
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29 00 02 28 00
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29 00 02 29 00
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29 00 02 2A 00
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29 00 02 2B 00
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/* STV0 */
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29 00 02 2D 20
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29 00 02 2F 0A
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29 00 02 30 44
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29 00 02 33 0C
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29 00 02 34 32
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29 00 02 37 44
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29 00 02 38 40
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29 00 02 39 00
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29 00 02 3A 50
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29 00 02 3B 50
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29 00 02 3D 42
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/* STV */
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29 00 02 3F 06
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29 00 02 43 06
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29 00 02 47 66
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29 00 02 4A 50
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29 00 02 4B 50
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29 00 02 4C 91
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/* GCK */
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29 00 02 4D 21
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29 00 02 4E 43
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29 00 02 51 12
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29 00 02 52 34
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29 00 03 55 82 02
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29 00 02 56 04
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29 00 02 58 21
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29 00 02 59 30
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29 00 02 5A 50
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29 00 02 5B 50
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29 00 03 5E 00 06
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29 00 02 5F 00
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/* EN_LFD_SOURCE=0 */
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29 00 02 65 82
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/* VDDO, VDDE */
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29 00 02 7E 20
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29 00 02 7F 3C
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29 00 02 82 04
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29 00 02 97 C0
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29 00 0D B6 05 00 05 00 00 00 00 00 05 05 00 00
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/* qclk=96/5 Mhz */
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29 00 02 91 44
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29 00 02 92 55
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29 00 02 93 1A
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29 00 02 94 5F
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/* SOG_HBP */
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29 00 02 D7 55
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29 00 02 DA 0A
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29 00 02 DE 08
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/* Normal */
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29 00 02 DB 05
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29 00 02 DC 55
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29 00 02 DD 22
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/* Line N */
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29 00 02 DF 05
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29 00 02 E0 55
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/* Line N+1 */
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29 00 02 E1 05
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29 00 02 E2 55
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/* TP0 */
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29 00 02 E3 05
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29 00 02 E4 55
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/* TP3 */
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29 00 02 E5 05
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29 00 02 E6 55
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/* Gate EQ */
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29 00 02 5C 00
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29 00 02 5D 00
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/* TP3 */
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29 00 02 8D 00
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29 00 02 8E 00
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/* No Sync @ TP */
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29 00 02 B5 90
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29 00 02 FF 25
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29 00 02 FB 01
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/* disable auto_vbp_vfp */
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29 00 02 05 00
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/* ESD_DET_ERR_SEL */
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29 00 02 19 07
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/* DP_N_GCK */
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29 00 02 1F 50
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29 00 02 20 50
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/* DP_N_1_GCK */
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29 00 02 26 50
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29 00 02 27 50
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/* TP0_GCK */
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29 00 02 33 50
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29 00 02 34 50
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/* TP3 GCK/MUX=1 */
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29 00 02 3F E0
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/* TP3_GCK_START_LINE */
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29 00 02 40 00
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/* TP3_STV */
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29 00 02 44 00
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29 00 02 45 40
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/* TP3_GCK */
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29 00 02 48 50
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29 00 02 49 50
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/* LSTP0 */
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29 00 02 5B 00
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29 00 02 5C 00
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29 00 02 5D 00
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29 00 02 5E D0
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29 00 02 61 50
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29 00 02 62 50
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/* en_vfp_addvsync */
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29 00 02 F1 10
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/* CMD2,Page10 */
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29 00 02 FF 2A
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29 00 02 FB 01
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/* PWRONOFF */
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/* STV */
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29 00 02 64 16
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/* CLR */
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29 00 02 67 16
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/* GCK */
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29 00 02 6A 16
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/* POL */
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29 00 02 70 30
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/* ABOFF */
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29 00 02 A2 F3
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29 00 02 A3 FF
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29 00 02 A4 FF
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29 00 02 A5 FF
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/* Long_V_TIMING disable */
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29 00 02 D6 08
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/* CMD2,Page6 */
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29 00 02 FF 26
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29 00 02 FB 01
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/* TPEN */
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29 00 02 00 81
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/* 90Hz */
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29 00 02 01 30
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29 00 02 02 31
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29 00 02 0A F2
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//Table A (90Hz)
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29 00 02 04 28
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29 00 02 06 3C
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29 00 02 0C 0B
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29 00 02 0D 0C
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29 00 02 0F 00
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29 00 02 11 00
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29 00 02 12 50
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29 00 02 13 AE
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29 00 02 14 A6
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29 00 02 16 10
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29 00 02 19 08
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29 00 02 1A FF
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29 00 02 1B 08
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29 00 02 1C 80
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29 00 02 22 00
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29 00 02 23 00
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29 00 02 2A 08
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29 00 02 2B FF
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29 00 02 1D 00
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29 00 02 1E 55
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29 00 02 1F 55
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29 00 02 24 00
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29 00 02 25 55
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29 00 02 2F 05
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29 00 02 30 55
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29 00 02 31 05
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29 00 02 32 6D
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29 00 02 39 00
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29 00 02 3A 55
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/* Table B (60Hz,81*1+101*19=2000, Extra=20) */
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29 00 02 8B 28
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29 00 02 8C 13
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29 00 02 8D 0A
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29 00 02 8F 0A
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29 00 02 91 00
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29 00 02 92 50
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29 00 02 93 51
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29 00 02 94 65
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29 00 02 96 10
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29 00 02 99 0A
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29 00 02 9A 7F
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29 00 02 9B 0A
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29 00 02 9C 0C
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29 00 02 9D 0A
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29 00 02 9E 7F
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29 00 02 3F 00
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29 00 02 40 75
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29 00 02 41 75
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29 00 02 42 75
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29 00 02 43 00
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29 00 02 44 75
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29 00 02 45 05
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29 00 02 46 75
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29 00 02 47 05
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29 00 02 48 8D
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29 00 02 49 00
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29 00 02 4A 75
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/* STV0 */
|
|
29 00 02 4D 5D
|
|
29 00 02 4E 60
|
|
/* STV */
|
|
29 00 02 4F 5D
|
|
29 00 02 50 60
|
|
/* GCK */
|
|
29 00 02 51 70
|
|
29 00 02 52 60
|
|
/* DP_N_GCK */
|
|
29 00 02 56 70
|
|
29 00 02 58 60
|
|
/* DP_N_1_GCK */
|
|
29 00 02 5B 70
|
|
29 00 02 5C 60
|
|
/* TP0_GCK */
|
|
29 00 02 60 70
|
|
29 00 02 61 60
|
|
/* TP3_GCK */
|
|
29 00 02 64 70
|
|
29 00 02 65 60
|
|
/* LSTP0 */
|
|
29 00 02 72 70
|
|
29 00 02 73 60
|
|
/* PRZ1 */
|
|
29 00 02 20 01
|
|
/* PRZ3 */
|
|
/* Rescan=3 */
|
|
29 00 02 33 11
|
|
29 00 02 34 78
|
|
29 00 02 35 16
|
|
/* DLH */
|
|
29 00 02 C8 04
|
|
29 00 02 C9 80
|
|
29 00 02 CA 4E
|
|
29 00 02 CB 00
|
|
29 00 02 A9 4C
|
|
29 00 02 AA 47
|
|
/* CMD2,Page7 */
|
|
29 00 02 FF 27
|
|
29 00 02 FB 01
|
|
/* VPOR_DYNH_EN=1, VPOR_CNT_REV=1 */
|
|
29 00 02 56 06
|
|
/* FR0(60Hz) */
|
|
29 00 02 58 80
|
|
29 00 02 59 53
|
|
29 00 02 5A 00
|
|
29 00 02 5B 14
|
|
29 00 02 5C 00
|
|
29 00 02 5D 01
|
|
29 00 02 5E 20
|
|
29 00 02 5F 10
|
|
29 00 02 60 00
|
|
29 00 02 61 1D
|
|
29 00 02 62 00
|
|
29 00 02 63 01
|
|
29 00 02 64 24
|
|
29 00 02 65 1C
|
|
29 00 02 66 00
|
|
29 00 02 67 01
|
|
29 00 02 68 25
|
|
/* FR1(90Hz) */
|
|
29 00 02 78 80
|
|
29 00 02 79 73
|
|
29 00 02 7A 00
|
|
29 00 02 7B 14
|
|
29 00 02 7C 00
|
|
29 00 02 7D 02
|
|
29 00 02 7E 20
|
|
29 00 02 7F 21
|
|
29 00 02 80 00
|
|
29 00 02 81 2A
|
|
29 00 02 82 00
|
|
29 00 02 83 01
|
|
29 00 02 84 1C
|
|
29 00 02 85 28
|
|
29 00 02 86 00
|
|
29 00 02 87 01
|
|
29 00 02 88 1D
|
|
|
|
29 00 02 00 00
|
|
29 00 02 C3 00
|
|
/* FTE output TE, FTE1 output TSVD, LEDPWM output TSHD */
|
|
29 00 02 D1 24
|
|
29 00 02 D2 53
|
|
/* CMD2,Page10 */
|
|
29 00 02 FF 2A
|
|
29 00 02 FB 01
|
|
29 00 02 01 05
|
|
29 00 02 02 55
|
|
/* TP0 */
|
|
29 00 02 03 05
|
|
29 00 02 04 75
|
|
/* TP3 */
|
|
29 00 02 05 05
|
|
29 00 02 06 75
|
|
/* PEN_EN=1, UL_FREQ=0 */
|
|
29 00 02 22 2F
|
|
/* 90Hz */
|
|
29 00 02 23 11
|
|
/* FR0 (60Hz) */
|
|
29 00 02 24 00
|
|
29 00 02 25 75
|
|
29 00 02 27 00
|
|
29 00 02 28 1A
|
|
29 00 02 29 00
|
|
29 00 02 2A 1A
|
|
29 00 02 2B 00
|
|
29 00 02 2D 1A
|
|
/* FR1 (90Hz) */
|
|
29 00 02 2F 00
|
|
29 00 02 30 55
|
|
29 00 02 32 00
|
|
29 00 02 33 1A
|
|
29 00 02 34 00
|
|
29 00 02 35 1A
|
|
29 00 02 36 00
|
|
29 00 02 37 1A
|
|
/* CMD2,Page3 */
|
|
29 00 02 FF 23
|
|
29 00 02 FB 01
|
|
/* DBV=12 bit */
|
|
29 00 02 00 80
|
|
/* PWM frequency */
|
|
29 00 02 07 00
|
|
/* CMD3,PageA */
|
|
29 00 02 FF E0
|
|
29 00 02 FB 01
|
|
/* VCOM Driving Ability */
|
|
29 00 02 14 60
|
|
29 00 02 16 C0
|
|
/* CMD3,PageB */
|
|
29 00 02 FF F0
|
|
29 00 02 FB 01
|
|
/* slave osc workaround */
|
|
29 00 02 3A 08
|
|
/* CMD3,PageC */
|
|
29 00 02 FF D0
|
|
29 00 02 FB 01
|
|
29 00 02 1C 88
|
|
29 00 02 1D 08
|
|
/* CMD1 */
|
|
29 00 02 FF 10
|
|
29 00 02 FB 01
|
|
/* Only Write Slave */
|
|
29 00 02 B9 01
|
|
/* CMD2,Page0 */
|
|
29 00 02 FF 20
|
|
29 00 02 FB 01
|
|
29 00 02 18 40
|
|
/* CMD1 */
|
|
29 00 02 FF 10
|
|
29 00 02 FB 01
|
|
/* Write Master & Slave */
|
|
29 00 02 B9 02
|
|
29 00 02 35 00
|
|
29 00 03 51 00 FF
|
|
29 00 02 53 24
|
|
29 00 02 55 00
|
|
29 00 02 BB 13
|
|
/* VBP+VFP=121 */
|
|
29 00 06 3B 03 5F 1A 04 04
|
|
/* CMD2,Page5 */
|
|
29 00 02 FF 25
|
|
/* FRM */
|
|
29 00 02 EC 00
|
|
/* CMD1 */
|
|
29 00 02 FF 10
|
|
29 00 02 FB 01
|
|
05 FF 01 11
|
|
05 FF 01 29
|
|
];
|
|
|
|
panel-exit-sequence = [
|
|
05 00 01 28
|
|
05 00 01 10
|
|
];
|
|
|
|
disp_timings1: display-timings {
|
|
native-mode = <&dsi1_timing0>;
|
|
dsi1_timing0: timing0 {
|
|
clock-frequency = <241300000>;
|
|
hactive = <1200>;
|
|
vactive = <2000>;
|
|
hfront-porch = <31>;
|
|
hsync-len = <4>;
|
|
hback-porch = <32>;
|
|
vfront-porch = <26>;
|
|
vsync-len = <2>;
|
|
vback-porch = <93>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&edp {
|
|
force-hpd;
|
|
status = "okay";
|
|
|
|
ports {
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
edp_out_panel: endpoint {
|
|
remote-endpoint = <&panel_in_edp>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&edp_in_vp1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gmac1 {
|
|
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
|
phy-mode = "rgmii-rxid";
|
|
clock_in_out = "output";
|
|
|
|
snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
|
|
snps,reset-active-low;
|
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
|
snps,reset-delays-us = <0 20000 100000>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <ð1m1_miim
|
|
ð1m1_tx_bus2
|
|
ð1m1_rx_bus2
|
|
ð1m1_rgmii_clk
|
|
ð1m1_rgmii_bus
|
|
ðm1_clk1_25m_out>;
|
|
|
|
tx_delay = <0x20>;
|
|
/* rx_delay = <0x3f>; */
|
|
|
|
phy-handle = <&rgmii_phy1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&hdptxphy {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
|
|
gsl3673@40 {
|
|
compatible = "GSL,GSL3673";
|
|
reg = <0x40>;
|
|
screen_max_x = <1536>;
|
|
screen_max_y = <2048>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&touch_gpio>;
|
|
irq_gpio_number = <&gpio0 RK_PC5 IRQ_TYPE_LEVEL_LOW>;
|
|
rst_gpio_number = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
&mdio1 {
|
|
rgmii_phy1: phy@1 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <0x1>;
|
|
clocks = <&cru REFCLKO25M_GMAC1_OUT>;
|
|
};
|
|
};
|
|
|
|
&mipidcphy0 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&pcie0 {
|
|
reset-gpios = <&gpio4 RK_PC7 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
lcd {
|
|
lcd_rst_gpio: lcd-rst-gpio {
|
|
rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
touch {
|
|
touch_gpio: touch-gpio {
|
|
rockchip,pins =
|
|
<0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,
|
|
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
usb {
|
|
usb_host_pwren: usb-host-pwren {
|
|
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
usb_otg0_pwren: usb-otg0-pwren {
|
|
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm1_6ch_1 {
|
|
pinctrl-0 = <&pwm1m0_ch1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&route_edp {
|
|
status = "okay";
|
|
};
|
|
|
|
&sdio {
|
|
max-frequency = <200000000>;
|
|
no-sd;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
disable-wp;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
non-removable;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc1m1_bus4 &sdmmc1m1_clk &sdmmc1m1_cmd>;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_otg {
|
|
vbus-supply = <&vcc5v0_otg>;
|
|
rockchip,sel-pipe-phystatus;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_otg {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&usbdp_phy {
|
|
maximum-speed = "high-speed";
|
|
rockchip,dp-lane-mux = <0 1 2 3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy_dp {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy_u3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_drd0_dwc3 {
|
|
phys = <&u2phy0_otg>;
|
|
phy-names = "usb2-phy";
|
|
extcon = <&u2phy0>;
|
|
maximum-speed = "high-speed";
|
|
snps,dis_u2_susphy_quirk;
|
|
snps,usb2-lpm-disable;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_drd1_dwc3 {
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&wireless_bluetooth {
|
|
status = "disabled";
|
|
};
|
|
|
|
&wireless_wlan {
|
|
WIFI,poweren_gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
|
|
};
|