33 lines
672 B
Plaintext
33 lines
672 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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#include "rv1106.dtsi"
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/ {
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compatible = "rockchip,rv1106g3";
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};
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&cru {
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assigned-clocks =
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<&cru PLL_GPLL>, <&cru PLL_CPLL>,
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<&cru ARMCLK>,
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<&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
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<&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
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<&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
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<&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
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assigned-clock-rates =
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<1188000000>, <700000000>,
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<1104000000>,
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<400000000>, <200000000>,
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<100000000>, <300000000>,
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<100000000>, <100000000>,
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<200000000>, <700000000>;
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};
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&npu {
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assigned-clock-rates = <700000000>;
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};
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