261 lines
6.3 KiB
Plaintext
261 lines
6.3 KiB
Plaintext
/*
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* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "rk322x.dtsi"
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#include "rk3229-cpu-opp.dtsi"
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/ {
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0x11030000";
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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rockchip,serial-id = <2>;
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rockchip,signal-irq = <159>;
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rockchip,wake-irq = <0>;
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rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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pinctrl-names = "default";
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pinctrl-0 = <&uart21_xfer>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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xin32k: xin32k {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "xin32k";
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#clock-cells = <0>;
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};
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};
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&cpu0 {
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enable-method = "psci";
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};
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&cpu1 {
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enable-method = "psci";
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};
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&cpu2 {
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enable-method = "psci";
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};
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&cpu3 {
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enable-method = "psci";
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};
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&emmc {
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max-frequency = <125000000>;
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broken-cd;
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bus-width = <8>;
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cap-mmc-highspeed;
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no-sdio;
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no-sd;
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disable-wp;
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non-removable;
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num-slots = <1>;
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/delete-property/ default-sample-phase;
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/delete-property/ pinctrl-names;
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/delete-property/ pinctrl-0;
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&gpu {
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mali-supply = <&vdd_logic>;
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};
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&i2c0 {
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status = "okay";
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rk805: rk805@18 {
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compatible = "rockchip,rk805";
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status = "okay";
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reg = <0x18>;
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interrupt-parent = <&gpio1>;
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
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spinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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rockchip,system-power-controller;
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wakeup-source;
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gpio-controller;
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#gpio-cells = <2>;
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#clock-cells = <1>;
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clock-output-names = "rk805-clkout1", "rk805-clkout2";
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rtc {
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status = "okay";
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};
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pwrkey {
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status = "okay";
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};
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gpio {
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status = "okay";
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};
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regulators {
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vdd_arm: DCDC_REG1 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-initial-mode = <0x1>;
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regulator-ramp-delay = <12500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-mode = <0x2>;
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <950000>;
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};
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};
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vdd_logic: DCDC_REG2 {
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regulator-name = "vdd_logic";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-initial-mode = <0x1>;
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regulator-ramp-delay = <12500>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-mode = <0x2>;
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-mode = <0x2>;
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regulator-on-in-suspend;
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};
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};
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vcc_io: DCDC_REG4 {
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regulator-name = "vcc_io";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-initial-mode = <0x1>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-mode = <0x2>;
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc_18: LDO_REG1 {
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regulator-name = "vcc_18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc_18emmc: LDO_REG2 {
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regulator-name = "vcc_18emmc";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vdd_10: LDO_REG3 {
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regulator-name = "vdd_10";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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};
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};
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};
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&io_domains {
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status = "okay";
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vccio1-supply = <&vcc_io>;
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vccio2-supply = <&vcc_18>;
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vccio4-supply = <&vcc_io>;
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};
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&pinctrl {
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pmic {
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pmic_int_l: pmic-int-l {
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rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_a1 */
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};
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};
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};
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&tsadc {
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rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
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status = "okay";
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};
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