49 lines
1.7 KiB
C
49 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2023 Rockchip Electronics Co., Ltd.
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*
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* Author: Joseph Chen <chenjh@rock-chips.com>
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*/
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#ifndef _CRU_RKX121_H
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#include "cru_rkx120.h"
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// TXCRU_SOFTRST_CON06(Offset:0x418)
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#define RKX121_SRST_DRESETN_C_LVDS_TX 0x0000006A
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#define RKX121_SRST_LVDS_RESETN_C_LVDS_TX 0x0000006B
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#define RKX121_SRST_PRESETN_C_LVDS_TX 0x0000006C
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// TXCRU_SOFTRST_CON11(Offset:0x42C)
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#define RKX121_SRST_PRESETN_LBIST_ADA_TX 0x000000B1
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// TXCRU_GATE_CON06(Offset:0x318)
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#define RKX121_DCLK_C_LVDS_TX_GATE 0x0000006A
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#define RKX121_CLK_LVDS_C_LVDS_TX_GATE 0x0000006B
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#define RKX121_PCLK_C_LVDS_TX_GATE 0x0000006C
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// TXCRU_GATE_CON11(Offset:0x32C)
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#define RKX121_PCLK_LBIST_ADA_TX_GATE 0x000000B1
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// TXCRU_CLKSEL_CON08(Offset:0x120)
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#define RKX121_CLK_LVDS1_SEL 0x01010008
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#define RKX121_CLK_LVDS1_SEL_CLK_LVDS1_CM 0U
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#define RKX121_CLK_LVDS1_SEL_CLK_LVDS_C_LVDS_TX 1U
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#define RKX121_CLK_LVDS0_SEL 0x01020008
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#define RKX121_CLK_LVDS0_SEL_CLK_LVDS0_CM 0U
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#define RKX121_CLK_LVDS0_SEL_CLK_LVDS_C_LVDS_TX 1U
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// TXCRU_CLKSEL_CON09(Offset:0x124)
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#define RKX121_CLK_LVDS_C_LVDS_TX_DIV 0x08000009
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#define RKX121_CLK_LVDS_C_LVDS_TX_SEL 0x020E0009
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#define RKX121_CLK_LVDS_C_LVDS_TX_SEL_CLK_TXPLL_MUX 0U
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#define RKX121_CLK_LVDS_C_LVDS_TX_SEL_CLK_CPLL_MUX 1U
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#define RKX121_CLK_LVDS_C_LVDS_TX_SEL_XIN_OSC0_FUNC 2U
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/* COMPOSITE */
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#define RKX121_CPS_CLK_LVDS_C_LVDS_TX COMPOSITE_CLK(RKX121_CLK_LVDS_C_LVDS_TX_SEL, RKX121_CLK_LVDS_C_LVDS_TX_DIV)
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#define RKX121_CPS_CLK_LVDS0 COMPOSITE_CLK(RKX121_CLK_LVDS0_SEL, 0)
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#define RKX121_CPS_CLK_LVDS1 COMPOSITE_CLK(RKX121_CLK_LVDS1_SEL, 0)
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#endif
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