483 lines
13 KiB
C
483 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Maxim MAX96745 pin control driver
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*
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* Copyright (c) 2022 Rockchip Electronics Co. Ltd.
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*/
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/max96745.h>
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#include "core.h"
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#include "pinconf.h"
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#include "pinmux.h"
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struct max96745_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctl;
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struct regmap *regmap;
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};
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struct max96745_function_data {
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u8 gpio_out_dis:1;
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u8 gpio_io_rx_en:1;
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u8 gpio_tx_en_a:1;
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u8 gpio_tx_en_b:1;
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u8 gpio_rx_en_a:1;
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u8 gpio_rx_en_b:1;
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u8 gpio_tx_id;
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u8 gpio_rx_id;
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};
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static int max96745_pinmux_set_mux(struct pinctrl_dev *pctldev,
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unsigned int function, unsigned int group)
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{
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struct max96745_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);
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struct function_desc *func;
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struct group_desc *grp;
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int i;
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func = pinmux_generic_get_function(pctldev, function);
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if (!func)
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return -EINVAL;
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grp = pinctrl_generic_get_group(pctldev, group);
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if (!grp)
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return -EINVAL;
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if (func->data) {
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struct max96745_function_data *data = func->data;
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for (i = 0; i < grp->num_pins; i++) {
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regmap_update_bits(mpctl->regmap,
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GPIO_A_REG(grp->pins[i]), GPIO_OUT_DIS,
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FIELD_PREP(GPIO_OUT_DIS, data->gpio_out_dis));
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if (data->gpio_tx_en_a || data->gpio_tx_en_b)
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regmap_update_bits(mpctl->regmap,
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GPIO_B_REG(grp->pins[i]),
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GPIO_TX_ID,
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FIELD_PREP(GPIO_TX_ID, data->gpio_tx_id));
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if (data->gpio_rx_en_a || data->gpio_rx_en_b)
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regmap_update_bits(mpctl->regmap,
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GPIO_C_REG(grp->pins[i]),
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GPIO_RX_ID,
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FIELD_PREP(GPIO_RX_ID, data->gpio_rx_id));
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regmap_update_bits(mpctl->regmap,
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GPIO_D_REG(grp->pins[i]),
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GPIO_TX_EN_A | GPIO_TX_EN_B | GPIO_IO_RX_EN |
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GPIO_RX_EN_A | GPIO_RX_EN_B,
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FIELD_PREP(GPIO_TX_EN_A, data->gpio_tx_en_a) |
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FIELD_PREP(GPIO_TX_EN_B, data->gpio_tx_en_b) |
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FIELD_PREP(GPIO_RX_EN_A, data->gpio_rx_en_a) |
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FIELD_PREP(GPIO_RX_EN_B, data->gpio_rx_en_b) |
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FIELD_PREP(GPIO_IO_RX_EN, data->gpio_io_rx_en));
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}
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}
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return 0;
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}
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static const struct pinmux_ops max96745_pinmux_ops = {
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.get_functions_count = pinmux_generic_get_function_count,
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.get_function_name = pinmux_generic_get_function_name,
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.get_function_groups = pinmux_generic_get_function_groups,
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.set_mux = max96745_pinmux_set_mux,
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};
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static const struct pinctrl_ops max96745_pinctrl_ops = {
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.get_groups_count = pinctrl_generic_get_group_count,
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.get_group_name = pinctrl_generic_get_group_name,
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.get_group_pins = pinctrl_generic_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
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.dt_free_map = pinconf_generic_dt_free_map,
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};
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static const struct pinctrl_pin_desc max96745_pins_desc[] = {
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PINCTRL_PIN(0, "MFP0"),
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PINCTRL_PIN(1, "MFP1"),
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PINCTRL_PIN(2, "MFP2"),
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PINCTRL_PIN(3, "MFP3"),
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PINCTRL_PIN(4, "MFP4"),
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PINCTRL_PIN(5, "MFP5"),
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PINCTRL_PIN(6, "MFP6"),
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PINCTRL_PIN(7, "MFP7"),
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PINCTRL_PIN(8, "MFP8"),
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PINCTRL_PIN(9, "MFP9"),
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PINCTRL_PIN(10, "MFP10"),
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PINCTRL_PIN(11, "MFP11"),
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PINCTRL_PIN(12, "MFP12"),
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PINCTRL_PIN(13, "MFP13"),
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PINCTRL_PIN(14, "MFP14"),
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PINCTRL_PIN(15, "MFP15"),
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PINCTRL_PIN(16, "MFP16"),
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PINCTRL_PIN(17, "MFP17"),
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PINCTRL_PIN(18, "MFP18"),
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PINCTRL_PIN(19, "MFP19"),
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PINCTRL_PIN(20, "MFP20"),
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PINCTRL_PIN(21, "MFP21"),
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PINCTRL_PIN(22, "MFP22"),
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PINCTRL_PIN(23, "MFP23"),
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PINCTRL_PIN(24, "MFP24"),
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PINCTRL_PIN(25, "MFP25"),
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};
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static int MFP0_pins[] = {0};
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static int MFP1_pins[] = {1};
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static int MFP2_pins[] = {2};
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static int MFP3_pins[] = {3};
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static int MFP4_pins[] = {4};
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static int MFP5_pins[] = {5};
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static int MFP6_pins[] = {6};
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static int MFP7_pins[] = {7};
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static int MFP8_pins[] = {8};
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static int MFP9_pins[] = {9};
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static int MFP10_pins[] = {10};
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static int MFP11_pins[] = {11};
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static int MFP12_pins[] = {12};
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static int MFP13_pins[] = {13};
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static int MFP14_pins[] = {14};
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static int MFP15_pins[] = {15};
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static int MFP16_pins[] = {16};
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static int MFP17_pins[] = {17};
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static int MFP18_pins[] = {18};
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static int MFP19_pins[] = {19};
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static int MFP20_pins[] = {20};
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static int MFP21_pins[] = {21};
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static int MFP22_pins[] = {22};
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static int MFP23_pins[] = {23};
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static int MFP24_pins[] = {24};
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static int MFP25_pins[] = {25};
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static int I2C_pins[] = {3, 7};
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static int UART_pins[] = {3, 7};
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#define GROUP_DESC(nm) \
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{ \
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.name = #nm, \
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.pins = nm ## _pins, \
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.num_pins = ARRAY_SIZE(nm ## _pins), \
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}
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static const struct group_desc max96745_groups[] = {
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GROUP_DESC(MFP0),
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GROUP_DESC(MFP1),
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GROUP_DESC(MFP2),
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GROUP_DESC(MFP3),
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GROUP_DESC(MFP4),
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GROUP_DESC(MFP5),
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GROUP_DESC(MFP6),
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GROUP_DESC(MFP7),
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GROUP_DESC(MFP8),
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GROUP_DESC(MFP9),
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GROUP_DESC(MFP10),
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GROUP_DESC(MFP11),
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GROUP_DESC(MFP12),
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GROUP_DESC(MFP13),
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GROUP_DESC(MFP14),
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GROUP_DESC(MFP15),
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GROUP_DESC(MFP16),
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GROUP_DESC(MFP17),
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GROUP_DESC(MFP18),
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GROUP_DESC(MFP19),
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GROUP_DESC(MFP20),
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GROUP_DESC(MFP21),
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GROUP_DESC(MFP22),
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GROUP_DESC(MFP23),
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GROUP_DESC(MFP24),
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GROUP_DESC(MFP25),
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GROUP_DESC(I2C),
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GROUP_DESC(UART),
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};
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static const char *MFP_groups[] = {
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"MFP0", "MFP1", "MFP2", "MFP3", "MFP4",
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"MFP5", "MFP6", "MFP7", "MFP8", "MFP9",
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"MFP10", "MFP11", "MFP12", "MFP13", "MFP14",
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"MFP15", "MFP16", "MFP17", "MFP18", "MFP19",
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"MFP20", "MFP21", "MFP22", "MFP23", "MFP24",
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"MFP25",
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};
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static const char *I2C_groups[] = { "I2C" };
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static const char *UART_groups[] = { "UART" };
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#define FUNCTION_DESC_GPIO_TX_A(id) \
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{ \
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.name = "GPIO_TX_A_"#id, \
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.group_names = MFP_groups, \
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.num_group_names = ARRAY_SIZE(MFP_groups), \
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.data = (void *)(const struct max96745_function_data []) { \
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{ .gpio_out_dis = 1, .gpio_tx_en_a = 1, \
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.gpio_io_rx_en = 1, .gpio_tx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO_TX_B(id) \
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{ \
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.name = "GPIO_TX_B_"#id, \
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.group_names = MFP_groups, \
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.num_group_names = ARRAY_SIZE(MFP_groups), \
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.data = (void *)(const struct max96745_function_data []) { \
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{ .gpio_out_dis = 1, .gpio_tx_en_b = 1, \
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.gpio_io_rx_en = 1, .gpio_tx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO_RX_A(id) \
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{ \
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.name = "GPIO_RX_A_"#id, \
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.group_names = MFP_groups, \
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.num_group_names = ARRAY_SIZE(MFP_groups), \
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.data = (void *)(const struct max96745_function_data []) { \
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{ .gpio_rx_en_a = 1, .gpio_rx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO_RX_B(id) \
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{ \
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.name = "GPIO_RX_B_"#id, \
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.group_names = MFP_groups, \
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.num_group_names = ARRAY_SIZE(MFP_groups), \
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.data = (void *)(const struct max96745_function_data []) { \
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{ .gpio_rx_en_b = 1, .gpio_rx_id = id } \
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}, \
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} \
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#define FUNCTION_DESC_GPIO() \
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{ \
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.name = "GPIO", \
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.group_names = MFP_groups, \
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.num_group_names = ARRAY_SIZE(MFP_groups), \
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.data = (void *)(const struct max96745_function_data []) { \
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{ } \
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}, \
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} \
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#define FUNCTION_DESC(nm) \
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{ \
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.name = #nm, \
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.group_names = nm##_groups, \
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.num_group_names = ARRAY_SIZE(nm##_groups), \
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} \
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static const struct function_desc max96745_functions[] = {
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FUNCTION_DESC_GPIO_TX_A(0),
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FUNCTION_DESC_GPIO_TX_A(1),
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FUNCTION_DESC_GPIO_TX_A(2),
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FUNCTION_DESC_GPIO_TX_A(3),
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FUNCTION_DESC_GPIO_TX_A(4),
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FUNCTION_DESC_GPIO_TX_A(5),
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FUNCTION_DESC_GPIO_TX_A(6),
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FUNCTION_DESC_GPIO_TX_A(7),
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FUNCTION_DESC_GPIO_TX_A(8),
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FUNCTION_DESC_GPIO_TX_A(9),
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FUNCTION_DESC_GPIO_TX_A(10),
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FUNCTION_DESC_GPIO_TX_A(11),
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FUNCTION_DESC_GPIO_TX_A(12),
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FUNCTION_DESC_GPIO_TX_A(13),
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FUNCTION_DESC_GPIO_TX_A(14),
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FUNCTION_DESC_GPIO_TX_A(15),
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FUNCTION_DESC_GPIO_TX_A(16),
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FUNCTION_DESC_GPIO_TX_A(17),
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FUNCTION_DESC_GPIO_TX_A(18),
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FUNCTION_DESC_GPIO_TX_A(19),
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FUNCTION_DESC_GPIO_TX_A(20),
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FUNCTION_DESC_GPIO_TX_A(21),
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FUNCTION_DESC_GPIO_TX_A(22),
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FUNCTION_DESC_GPIO_TX_A(23),
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FUNCTION_DESC_GPIO_TX_A(24),
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FUNCTION_DESC_GPIO_TX_A(25),
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FUNCTION_DESC_GPIO_TX_A(26),
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FUNCTION_DESC_GPIO_TX_A(27),
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FUNCTION_DESC_GPIO_TX_A(28),
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FUNCTION_DESC_GPIO_TX_A(29),
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FUNCTION_DESC_GPIO_TX_A(30),
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FUNCTION_DESC_GPIO_TX_A(31),
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FUNCTION_DESC_GPIO_TX_B(0),
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FUNCTION_DESC_GPIO_TX_B(1),
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FUNCTION_DESC_GPIO_TX_B(2),
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FUNCTION_DESC_GPIO_TX_B(3),
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FUNCTION_DESC_GPIO_TX_B(4),
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FUNCTION_DESC_GPIO_TX_B(5),
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FUNCTION_DESC_GPIO_TX_B(6),
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FUNCTION_DESC_GPIO_TX_B(7),
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FUNCTION_DESC_GPIO_TX_B(8),
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FUNCTION_DESC_GPIO_TX_B(9),
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FUNCTION_DESC_GPIO_TX_B(10),
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FUNCTION_DESC_GPIO_TX_B(11),
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FUNCTION_DESC_GPIO_TX_B(12),
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FUNCTION_DESC_GPIO_TX_B(13),
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FUNCTION_DESC_GPIO_TX_B(14),
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FUNCTION_DESC_GPIO_TX_B(15),
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FUNCTION_DESC_GPIO_TX_B(16),
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FUNCTION_DESC_GPIO_TX_B(17),
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FUNCTION_DESC_GPIO_TX_B(18),
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FUNCTION_DESC_GPIO_TX_B(19),
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FUNCTION_DESC_GPIO_TX_B(20),
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FUNCTION_DESC_GPIO_TX_B(21),
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FUNCTION_DESC_GPIO_TX_B(22),
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FUNCTION_DESC_GPIO_TX_B(23),
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FUNCTION_DESC_GPIO_TX_B(24),
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FUNCTION_DESC_GPIO_TX_B(25),
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FUNCTION_DESC_GPIO_TX_B(26),
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FUNCTION_DESC_GPIO_TX_B(27),
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FUNCTION_DESC_GPIO_TX_B(28),
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FUNCTION_DESC_GPIO_TX_B(29),
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FUNCTION_DESC_GPIO_TX_B(30),
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FUNCTION_DESC_GPIO_TX_B(31),
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FUNCTION_DESC_GPIO_RX_A(0),
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FUNCTION_DESC_GPIO_RX_A(1),
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FUNCTION_DESC_GPIO_RX_A(2),
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FUNCTION_DESC_GPIO_RX_A(3),
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FUNCTION_DESC_GPIO_RX_A(4),
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FUNCTION_DESC_GPIO_RX_A(5),
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FUNCTION_DESC_GPIO_RX_A(6),
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FUNCTION_DESC_GPIO_RX_A(7),
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FUNCTION_DESC_GPIO_RX_A(8),
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FUNCTION_DESC_GPIO_RX_A(9),
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FUNCTION_DESC_GPIO_RX_A(10),
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FUNCTION_DESC_GPIO_RX_A(11),
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FUNCTION_DESC_GPIO_RX_A(12),
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FUNCTION_DESC_GPIO_RX_A(13),
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FUNCTION_DESC_GPIO_RX_A(14),
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FUNCTION_DESC_GPIO_RX_A(15),
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FUNCTION_DESC_GPIO_RX_A(16),
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FUNCTION_DESC_GPIO_RX_A(17),
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FUNCTION_DESC_GPIO_RX_A(18),
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FUNCTION_DESC_GPIO_RX_A(19),
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FUNCTION_DESC_GPIO_RX_A(20),
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FUNCTION_DESC_GPIO_RX_A(21),
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FUNCTION_DESC_GPIO_RX_A(22),
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FUNCTION_DESC_GPIO_RX_A(23),
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FUNCTION_DESC_GPIO_RX_A(24),
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FUNCTION_DESC_GPIO_RX_A(25),
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FUNCTION_DESC_GPIO_RX_A(26),
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FUNCTION_DESC_GPIO_RX_A(27),
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FUNCTION_DESC_GPIO_RX_A(28),
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FUNCTION_DESC_GPIO_RX_A(29),
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FUNCTION_DESC_GPIO_RX_A(30),
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FUNCTION_DESC_GPIO_RX_A(31),
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FUNCTION_DESC_GPIO_RX_B(0),
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FUNCTION_DESC_GPIO_RX_B(1),
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FUNCTION_DESC_GPIO_RX_B(2),
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FUNCTION_DESC_GPIO_RX_B(3),
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FUNCTION_DESC_GPIO_RX_B(4),
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FUNCTION_DESC_GPIO_RX_B(5),
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FUNCTION_DESC_GPIO_RX_B(6),
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FUNCTION_DESC_GPIO_RX_B(7),
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FUNCTION_DESC_GPIO_RX_B(8),
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FUNCTION_DESC_GPIO_RX_B(9),
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FUNCTION_DESC_GPIO_RX_B(10),
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FUNCTION_DESC_GPIO_RX_B(11),
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FUNCTION_DESC_GPIO_RX_B(12),
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FUNCTION_DESC_GPIO_RX_B(13),
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FUNCTION_DESC_GPIO_RX_B(14),
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FUNCTION_DESC_GPIO_RX_B(15),
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FUNCTION_DESC_GPIO_RX_B(16),
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FUNCTION_DESC_GPIO_RX_B(17),
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FUNCTION_DESC_GPIO_RX_B(18),
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FUNCTION_DESC_GPIO_RX_B(19),
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FUNCTION_DESC_GPIO_RX_B(20),
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FUNCTION_DESC_GPIO_RX_B(21),
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FUNCTION_DESC_GPIO_RX_B(22),
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FUNCTION_DESC_GPIO_RX_B(23),
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FUNCTION_DESC_GPIO_RX_B(24),
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FUNCTION_DESC_GPIO_RX_B(25),
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FUNCTION_DESC_GPIO_RX_B(26),
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FUNCTION_DESC_GPIO_RX_B(27),
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FUNCTION_DESC_GPIO_RX_B(28),
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FUNCTION_DESC_GPIO_RX_B(29),
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FUNCTION_DESC_GPIO_RX_B(30),
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FUNCTION_DESC_GPIO_RX_B(31),
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FUNCTION_DESC_GPIO(),
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FUNCTION_DESC(I2C),
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FUNCTION_DESC(UART),
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};
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static int max96745_pinctrl_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct max96745_pinctrl *mpctl;
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struct pinctrl_desc *pctl_desc;
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int i, ret;
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mpctl = devm_kzalloc(dev, sizeof(*mpctl), GFP_KERNEL);
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if (!mpctl)
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return -ENOMEM;
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mpctl->dev = dev;
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platform_set_drvdata(pdev, mpctl);
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mpctl->regmap = dev_get_regmap(dev->parent, NULL);
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if (!mpctl->regmap)
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return dev_err_probe(dev, -ENODEV, "failed to get regmap\n");
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pctl_desc = devm_kzalloc(dev, sizeof(*pctl_desc), GFP_KERNEL);
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if (!pctl_desc)
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return -ENOMEM;
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pctl_desc->name = dev_name(dev);
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pctl_desc->owner = THIS_MODULE;
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pctl_desc->pctlops = &max96745_pinctrl_ops;
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pctl_desc->pmxops = &max96745_pinmux_ops;
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pctl_desc->pins = max96745_pins_desc;
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pctl_desc->npins = ARRAY_SIZE(max96745_pins_desc);
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ret = devm_pinctrl_register_and_init(dev, pctl_desc, mpctl,
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&mpctl->pctl);
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if (ret)
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return dev_err_probe(dev, ret, "failed to register pinctrl\n");
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for (i = 0; i < ARRAY_SIZE(max96745_groups); i++) {
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|
const struct group_desc *group = &max96745_groups[i];
|
|
|
|
ret = pinctrl_generic_add_group(mpctl->pctl, group->name,
|
|
group->pins, group->num_pins,
|
|
group->data);
|
|
if (ret < 0)
|
|
return dev_err_probe(dev, ret,
|
|
"failed to register group %s\n",
|
|
group->name);
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(max96745_functions); i++) {
|
|
const struct function_desc *func = &max96745_functions[i];
|
|
|
|
ret = pinmux_generic_add_function(mpctl->pctl, func->name,
|
|
func->group_names,
|
|
func->num_group_names,
|
|
func->data);
|
|
if (ret < 0)
|
|
return dev_err_probe(dev, ret,
|
|
"failed to register function %s\n",
|
|
func->name);
|
|
}
|
|
|
|
return pinctrl_enable(mpctl->pctl);
|
|
}
|
|
|
|
static const struct of_device_id max96745_pinctrl_of_match[] = {
|
|
{ .compatible = "maxim,max96745-pinctrl" },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, max96745_pinctrl_of_match);
|
|
|
|
static struct platform_driver max96745_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "max96745-pinctrl",
|
|
.of_match_table = max96745_pinctrl_of_match,
|
|
},
|
|
.probe = max96745_pinctrl_probe,
|
|
};
|
|
|
|
module_platform_driver(max96745_pinctrl_driver);
|
|
|
|
MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
|
|
MODULE_DESCRIPTION("Maxim MAX96745 pin control driver");
|
|
MODULE_LICENSE("GPL");
|