105 lines
1.6 KiB
Plaintext
105 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include "rv1109.dtsi"
|
|
#include <dt-bindings/display/media-bus-format.h>
|
|
|
|
/ {
|
|
model = "Rockchip RV1109 FPGA Board";
|
|
compatible = "rockchip,rv1109-fpga", "rockchip,rv1109";
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x10000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 initrd=0x9000000,0xb05e7 init=/init";
|
|
};
|
|
|
|
panel: panel {
|
|
compatible = "simple-panel";
|
|
bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
|
|
status = "okay";
|
|
|
|
display-timings {
|
|
native-mode = <&kd050fwfba002_timing>;
|
|
|
|
kd050fwfba002_timing: timing0 {
|
|
clock-frequency = <13500000>;
|
|
hactive = <800>;
|
|
vactive = <1280>;
|
|
hback-porch = <24>;
|
|
hfront-porch = <24>;
|
|
vback-porch = <4>;
|
|
vfront-porch = <2>;
|
|
hsync-len = <16>;
|
|
vsync-len = <2>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
|
|
port {
|
|
panel_in_rgb: endpoint {
|
|
remote-endpoint = <&rgb_out_panel>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&display_subsystem {
|
|
status = "okay";
|
|
};
|
|
|
|
&fiq_debugger {
|
|
rockchip,baudrate = <115200>;
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&rgb {
|
|
status = "okay";
|
|
ports {
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
rgb_out_panel: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&panel_in_rgb>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&rkvenc {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
clocks = <&xin24m>, <&xin24m>;
|
|
};
|
|
|
|
&vop {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|