// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2022 Rockchip Electronics Co., Ltd. * */ / { compatible = "radxa,rock-5b", "rockchip,rk3588"; camera_pwdn_gpio: camera-pwdn-gpio { status = "disabled"; compatible = "regulator-fixed"; regulator-name = "camera_pwdn_gpio"; regulator-always-on; regulator-boot-on; enable-active-high; gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&cam_pwdn_gpio>; }; clk_cam_24m: external-camera-clock-24m { status = "disabled"; compatible = "fixed-clock"; clock-frequency = <24000000>; clock-output-names = "clk_cam_24m"; #clock-cells = <0>; }; }; &i2c3 { status = "disabled"; imx415: imx415@1a { status = "disabled"; compatible = "sony,imx415"; reg = <0x1a>; clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; clock-names = "xvclk"; pinctrl-names = "default"; pinctrl-0 = <&mipim0_camera3_clk>; power-domains = <&power RK3588_PD_VI>; pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "RADXA-CAMERA-4K"; rockchip,camera-module-lens-name = "DEFAULT"; port { imx415_out0: endpoint { remote-endpoint = <&mipidphy0_in_ucam0>; data-lanes = <1 2 3 4>; }; }; }; camera_imx219: camera-imx219@10 { status = "disabled"; compatible = "sony,imx219"; reg = <0x10>; clocks = <&clk_cam_24m>; clock-names = "xvclk"; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "rpi-camera-v2"; rockchip,camera-module-lens-name = "default"; port { imx219_out0: endpoint { remote-endpoint = <&mipidphy0_in_ucam1>; data-lanes = <1 2>; }; }; }; }; &csi2_dphy0_hw { status = "disabled"; }; &csi2_dphy0 { status = "disabled"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; mipidphy0_in_ucam0: endpoint@1 { reg = <1>; remote-endpoint = <&imx415_out0>; data-lanes = <1 2 3 4>; }; mipidphy0_in_ucam1: endpoint@2 { reg = <2>; remote-endpoint = <&imx219_out0>; data-lanes = <1 2>; }; }; port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; csidphy0_out: endpoint@0 { reg = <0>; remote-endpoint = <&mipi2_csi2_input>; }; }; }; }; &mipi2_csi2 { status = "disabled"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; mipi2_csi2_input: endpoint@1 { reg = <1>; remote-endpoint = <&csidphy0_out>; }; }; port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; mipi2_csi2_output: endpoint@0 { reg = <0>; remote-endpoint = <&cif_mipi2_in0>; }; }; }; }; &rkcif { status = "disabled"; }; &rkcif_mipi_lvds2 { status = "disabled"; port { cif_mipi2_in0: endpoint { remote-endpoint = <&mipi2_csi2_output>; }; }; }; &rkcif_mipi_lvds2_sditf { status = "disabled"; port { mipi_lvds2_sditf: endpoint { remote-endpoint = <&isp0_vir0>; }; }; }; &rkcif_mmu { status = "disabled"; }; &rkisp0 { status = "disabled"; }; &isp0_mmu { status = "disabled"; }; &rkisp0_vir0 { status = "disabled"; port { #address-cells = <1>; #size-cells = <0>; isp0_vir0: endpoint@0 { reg = <0>; remote-endpoint = <&mipi_lvds2_sditf>; }; }; }; &pinctrl { camera { cam_pwdn_gpio: cam-pwdn-gpio { rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; };