// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2021 Rockchip Electronics Co., Ltd. * */ #include "dt-bindings/usb/pd.h" #include "rk3588.dtsi" #include "rk3588-evb.dtsi" #include "rk3588-rk806-dual.dtsi" / { pcie20_avdd0v85: pcie20-avdd0v85 { compatible = "regulator-fixed"; regulator-name = "pcie20_avdd0v85"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <850000>; regulator-max-microvolt = <850000>; vin-supply = <&avdd_0v85_s0>; }; pcie20_avdd1v8: pcie20-avdd1v8 { compatible = "regulator-fixed"; regulator-name = "pcie20_avdd1v8"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; vin-supply = <&avcc_1v8_s0>; }; pcie30_avdd0v75: pcie30-avdd0v75 { compatible = "regulator-fixed"; regulator-name = "pcie30_avdd0v75"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <750000>; regulator-max-microvolt = <750000>; vin-supply = <&avdd_0v75_s0>; }; pcie30_avdd1v8: pcie30-avdd1v8 { compatible = "regulator-fixed"; regulator-name = "pcie30_avdd1v8"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; vin-supply = <&avcc_1v8_s0>; }; vbus5v0_typec: vbus5v0-typec { compatible = "regulator-fixed"; regulator-name = "vbus5v0_typec"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; gpio = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_usb>; pinctrl-names = "default"; pinctrl-0 = <&typec5v_pwren>; }; vcc3v3_lcd_n: vcc3v3-lcd0-n { compatible = "regulator-fixed"; regulator-name = "vcc3v3_lcd0_n"; regulator-boot-on; enable-active-high; gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc_1v8_s0>; }; vcc3v3_pcie30: vcc3v3-pcie30 { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pcie30"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; startup-delay-us = <5000>; vin-supply = <&vcc12v_dcin>; }; vcc5v0_host: vcc5v0-host { compatible = "regulator-fixed"; regulator-name = "vcc5v0_host"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_usb>; pinctrl-names = "default"; pinctrl-0 = <&vcc5v0_host_en>; }; vcc_mipicsi0: vcc-mipicsi0-regulator { compatible = "regulator-fixed"; gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mipicsi0_pwr>; regulator-name = "vcc_mipicsi0"; enable-active-high; }; vcc_mipicsi1: vcc-mipicsi1-regulator { compatible = "regulator-fixed"; gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mipicsi1_pwr>; regulator-name = "vcc_mipicsi1"; enable-active-high; }; vcc_mipidcphy0: vcc-mipidcphy0-regulator { compatible = "regulator-fixed"; gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mipidcphy0_pwr>; regulator-name = "vcc_mipidcphy0"; enable-active-high; }; }; &backlight { pwms = <&pwm2 0 25000 0>; status = "okay"; }; &combphy0_ps { status = "okay"; }; &combphy1_ps { status = "okay"; }; &combphy2_psu { status = "okay"; }; &dp0 { status = "okay"; }; &dp0_in_vp2 { status = "okay"; }; &dp1 { pinctrl-names = "default"; pinctrl-0 = <&dp1_hpd>; hpd-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; status = "okay"; }; &dp1_in_vp2 { status = "okay"; }; /* * mipi_dcphy0 needs to be enabled * when dsi0 is enabled */ &dsi0 { status = "okay"; }; &dsi0_in_vp2 { status = "disabled"; }; &dsi0_in_vp3 { status = "okay"; }; &dsi0_panel { power-supply = <&vcc3v3_lcd_n>; reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&lcd_rst_gpio>; }; /* * mipi_dcphy1 needs to be enabled * when dsi1 is enabled */ &dsi1 { status = "disabled"; }; &dsi1_in_vp2 { status = "disabled"; }; &dsi1_in_vp3 { status = "disabled"; }; &dsi1_panel { power-supply = <&vcc3v3_lcd_n>; /* * because in hardware, the two screens share the reset pin, * so reset-gpios need only in dsi1 enable and dsi0 disabled * case. */ //reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>; //pinctrl-names = "default"; //pinctrl-0 = <&lcd_rst_gpio>; }; &hdmi0 { enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; status = "okay"; }; &hdmi0_in_vp0 { status = "okay"; }; &hdmi0_sound { status = "okay"; }; &hdmi1 { enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; status = "okay"; }; &hdmi1_in_vp1 { status = "okay"; }; &hdmi1_sound { status = "okay"; }; &hdptxphy_hdmi0 { status = "okay"; }; &hdptxphy_hdmi1 { status = "okay"; }; &i2c2 { status = "okay"; usbc0: fusb302@22 { compatible = "fcs,fusb302"; reg = <0x22>; interrupt-parent = <&gpio3>; interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&usbc0_int>; vbus-supply = <&vbus5v0_typec>; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; usbc0_role_sw: endpoint@0 { remote-endpoint = <&dwc3_0_role_switch>; }; }; }; usb_con: connector { compatible = "usb-c-connector"; label = "USB-C"; data-role = "dual"; power-role = "dual"; try-power-role = "sink"; op-sink-microwatt = <1000000>; sink-pdos = ; source-pdos = ; altmodes { #address-cells = <1>; #size-cells = <0>; altmode@0 { reg = <0>; svid = <0xff01>; vdo = <0xffffffff>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; usbc0_orien_sw: endpoint { remote-endpoint = <&usbdp_phy0_orientation_switch>; }; }; port@1 { reg = <1>; dp_altmode_mux: endpoint { remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; }; }; }; }; }; hym8563: hym8563@51 { compatible = "haoyu,hym8563"; reg = <0x51>; #clock-cells = <0>; clock-frequency = <32768>; clock-output-names = "hym8563"; pinctrl-names = "default"; pinctrl-0 = <&hym8563_int>; interrupt-parent = <&gpio0>; interrupts = ; wakeup-source; }; }; &i2c6 { status = "okay"; gt1x: gt1x@14 { compatible = "goodix,gt1x"; reg = <0x14>; pinctrl-names = "default"; pinctrl-0 = <&touch_gpio>; goodix,rst-gpio = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>; goodix,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_LOW>; power-supply = <&vcc3v3_lcd_n>; }; }; &i2s5_8ch { status = "okay"; }; &i2s6_8ch { status = "okay"; }; &mipi_dcphy0 { status = "okay"; }; &mipi_dcphy1 { status = "disabled"; }; &pcie2x1l0 { reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; status = "okay"; }; &pcie30phy { rockchip,pcie30-phymode = ; status = "okay"; }; &pcie3x4 { reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie30>; status = "okay"; }; &pinctrl { cam { mipicsi0_pwr: mipicsi0-pwr { rockchip,pins = /* camera power en */ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; }; mipicsi1_pwr: mipicsi1-pwr { rockchip,pins = /* camera power en */ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; }; mipidcphy0_pwr: mipidcphy0-pwr { rockchip,pins = /* camera power en */ <2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; dp { dp1_hpd: dp1-hpd { rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; }; }; hym8563 { hym8563_int: hym8563-int { rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; lcd { lcd_rst_gpio: lcd-rst-gpio { rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; touch { touch_gpio: touch-gpio { rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>, <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; usb-typec { usbc0_int: usbc0-int { rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; }; typec5v_pwren: typec5v-pwren { rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; &pwm2 { status = "okay"; }; &route_dsi0 { status = "okay"; connect = <&vp3_out_dsi0>; }; &route_dsi1 { status = "disabled"; connect = <&vp3_out_dsi1>; }; &sata0 { status = "okay"; }; &u2phy0_otg { rockchip,typec-vbus-det; }; &u2phy1_otg { phy-supply = <&vcc5v0_host>; }; &u2phy2_host { phy-supply = <&vcc5v0_host>; }; &u2phy3_host { phy-supply = <&vcc5v0_host>; }; &usbdp_phy0 { orientation-switch; svid = <0xff01>; sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; port { #address-cells = <1>; #size-cells = <0>; usbdp_phy0_orientation_switch: endpoint@0 { reg = <0>; remote-endpoint = <&usbc0_orien_sw>; }; usbdp_phy0_dp_altmode_mux: endpoint@1 { reg = <1>; remote-endpoint = <&dp_altmode_mux>; }; }; }; &usbdp_phy1 { rockchip,dp-lane-mux = <2 3>; }; &usbdrd_dwc3_0 { dr_mode = "otg"; usb-role-switch; port { #address-cells = <1>; #size-cells = <0>; dwc3_0_role_switch: endpoint@0 { reg = <0>; remote-endpoint = <&usbc0_role_sw>; }; }; }; &usbhost3_0 { status = "disabled"; }; &usbhost_dwc3_0 { status = "disabled"; };