// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2022 Rockchip Electronics Co., Ltd. * Copyright (c) 2024 Cyber RD Group * */ /dts-v1/; #include #include #include #include #include #include #include #include #include "dt-bindings/usb/pd.h" #include "rk3588.dtsi" #include "rk3588-rk806-single.dtsi" #include "rk3588-linux.dtsi" / { model = "Cyber 3588 AIB"; compatible = "cyber,cyber3588-aib", "rockchip,rk3588"; /delete-node/ chosen; vcc12v_dcin: vcc12v-dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; }; vcc5v0_sys: vcc5v0-sys { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&vcc12v_dcin>; }; wwan_disable: wwan-disable-regulator { compatible = "regulator-fixed"; regulator-name = "wwan_disable"; enable-active-high; gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&wwan_disable_h>; pinctrl-names = "default"; regulator-boot-on; regulator-always-on; }; wwan_power_off: wwan-power-off-regulator { compatible = "regulator-fixed"; regulator-name = "wwan_power_off"; enable-active-high; gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&wwan_power_off_h>; pinctrl-names = "default"; regulator-boot-on; regulator-always-on; }; switch_phy_pwr_en: switch-phy-pwr-en { compatible = "regulator-fixed"; regulator-name = "vcc5v0_host"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&phy_pwr_en>; vin-supply = <&vcc12v_dcin>; }; pcie_wifi_enable: pcie-wifi-enable-regulator { compatible = "regulator-fixed"; regulator-name = "pcie_wifi_enable"; enable-active-high; gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie_wifi_enable_h>; pinctrl-names = "default"; regulator-boot-on; regulator-always-on; }; vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { compatible = "regulator-fixed"; regulator-name = "vcc_1v1_nldo_s3"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; vin-supply = <&vcc5v0_sys>; }; hdmi0_sound: hdmi0-sound { status = "okay"; compatible = "rockchip,hdmi"; rockchip,mclk-fs = <128>; rockchip,card-name = "rockchip-hdmi0"; rockchip,cpu = <&i2s5_8ch>; rockchip,codec = <&hdmi0>; rockchip,jack-det; }; dp0_sound: dp0-sound { status = "okay"; compatible = "rockchip,hdmi"; rockchip,card-name = "rockchip-dp0"; rockchip,mclk-fs = <512>; rockchip,cpu = <&spdif_tx2>; rockchip,codec = <&dp0 1>; rockchip,jack-det; }; vcc5v0_host: vcc5v0-host-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_host"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; vin-supply = <&vcc5v0_sys>; }; usb5v0_typec0: usb5v0-typec0-regulator{ compatible = "regulator-fixed"; regulator-name = "vcc5v0_host"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&vcc5v0_otg_en>; vin-supply = <&vcc5v0_sys>; }; vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2 { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pcie2x1l2"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; vin-supply = <&vcc5v0_sys>; }; vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0 { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pcie2x1l0"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; //enable-active-high; regulator-boot-on; regulator-always-on; //gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; startup-delay-us = <50000>; vin-supply = <&vcc5v0_sys>; }; vcc3v3_pcie30: vcc3v3-pcie30 { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pcie30"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; //enable-active-high; //gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; regulator-always-on; regulator-boot-on; vin-supply = <&vcc5v0_sys>; }; vcc5v0_sata: vcc5v0-sata { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sata"; regulator-always-on; regulator-boot-on; startup-delay-us = <1000000>; //usb-pd-controller = <&usbc0>; enable-active-high; gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&sata1_pwr_en>; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&vcc12v_dcin>; }; gpio-leds { compatible = "gpio-leds"; pinctrl-names = "default"; user-led2 { gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "on"; }; }; /* If hdmirx node is disabled, delete the reserved-memory node here. */ reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; /* Reserve 256MB memory for hdmirx-controller@fdee0000 */ cma { compatible = "shared-dma-pool"; reusable; reg = <0x0 (256 * 0x100000) 0x0 (256 * 0x100000)>; linux,cma-default; }; }; hdmiin-sound { compatible = "rockchip,hdmi"; rockchip,mclk-fs = <128>; rockchip,format = "i2s"; rockchip,bitclock-master = <&hdmirx_ctrler>; rockchip,frame-master = <&hdmirx_ctrler>; rockchip,card-name = "rockchip-hdmiin"; rockchip,cpu = <&i2s7_8ch>; rockchip,codec = <&hdmirx_ctrler 0>; rockchip,jack-det; }; fan0: pwm-fan { compatible = "pwm-fan"; #cooling-cells = <2>; cooling-levels = <72 94 117 139 162 184 207 229 255>; pwms = <&pwm1 0 10000 1>; }; rtl8367s { compatible = "realtek,rtl8367s", "realtek,rtl8367b"; cpu_port = <7>; mii-bus = <&mdio1>; realtek,extif2 = <1 0 1 1 1 1 1 1 2>; phy-id = <29>; }; }; &av1d { status = "okay"; }; &av1d_mmu { status = "okay"; }; &cpu_l0 { cpu-supply = <&vdd_cpu_lit_s0>; mem-supply = <&vdd_cpu_lit_mem_s0>; }; &cpu_b0 { cpu-supply = <&vdd_cpu_big0_s0>; mem-supply = <&vdd_cpu_big0_mem_s0>; }; &cpu_b2 { cpu-supply = <&vdd_cpu_big1_s0>; mem-supply = <&vdd_cpu_big1_mem_s0>; }; &gpu { mali-supply = <&vdd_gpu_s0>; mem-supply = <&vdd_gpu_mem_s0>; status = "okay"; }; &rknpu { rknpu-supply = <&vdd_npu_s0>; mem-supply = <&vdd_npu_mem_s0>; status = "okay"; }; &rknpu_mmu { status = "okay"; }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c0m2_xfer>; vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { compatible = "rockchip,rk8602"; reg = <0x42>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "rk860x-reg"; regulator-name = "vdd_cpu_big0_s0"; regulator-min-microvolt = <550000>; regulator-max-microvolt = <1050000>; regulator-ramp-delay = <2300>; rockchip,suspend-voltage-selector = <1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-off-in-suspend; }; }; vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { compatible = "rockchip,rk8603"; reg = <0x43>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "rk860x-reg"; regulator-name = "vdd_cpu_big1_s0"; regulator-min-microvolt = <550000>; regulator-max-microvolt = <1050000>; regulator-ramp-delay = <2300>; rockchip,suspend-voltage-selector = <1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-off-in-suspend; }; }; }; &dmc { center-supply = <&vdd_ddr_s0>; mem-supply = <&vdd_log_s0>; status = "okay"; }; &dfi { status = "okay"; }; &i2c1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c1m2_xfer>; vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { compatible = "rockchip,rk8602"; reg = <0x42>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "rk860x-reg"; regulator-name = "vdd_npu_s0"; regulator-min-microvolt = <550000>; regulator-max-microvolt = <950000>; regulator-ramp-delay = <2300>; rockchip,suspend-voltage-selector = <1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-off-in-suspend; }; }; }; &iep { status = "okay"; }; &iep_mmu { status = "okay"; }; &jpegd { status = "okay"; }; &jpegd_mmu { status = "okay"; }; &jpege_ccu { status = "okay"; }; &jpege0 { status = "okay"; }; &jpege0_mmu { status = "okay"; }; &jpege1 { status = "okay"; }; &jpege1_mmu { status = "okay"; }; &jpege2 { status = "okay"; }; &jpege2_mmu { status = "okay"; }; &jpege3 { status = "okay"; }; &jpege3_mmu { status = "okay"; }; &vdpu { status = "okay"; }; &vdpu_mmu { status = "okay"; }; &mpp_srv { status = "okay"; }; &rga3_core0 { status = "okay"; }; &rga3_0_mmu { status = "okay"; }; &rga3_core1 { status = "okay"; }; &rga3_1_mmu { status = "okay"; }; &rga2 { status = "okay"; }; &rkvdec_ccu { status = "okay"; }; &rkvdec0 { status = "okay"; }; &rkvdec0_mmu { status = "okay"; }; &rkvdec1 { status = "okay"; }; &rkvdec1_mmu { status = "okay"; }; &rkvenc_ccu { status = "okay"; }; &rkvenc0 { status = "okay"; }; &rkvenc0_mmu { status = "okay"; }; &rkvenc1 { status = "okay"; }; &rkvenc1_mmu { status = "okay"; }; &saradc { status = "okay"; vref-supply = <&avcc_1v8_s0>; }; &sdhci { bus-width = <8>; no-sdio; no-sd; non-removable; max-frequency = <200000000>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; status = "okay"; }; &sdmmc { max-frequency = <200000000>; no-sdio; no-mmc; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; disable-wp; sd-uhs-sdr104; vmmc-supply = <&vcc_3v3_s3>; vqmmc-supply = <&vccio_sd_s0>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; status = "okay"; }; &soc_thermal { polling-delay = <1000>; polling-delay-passive = <2000>; trips { trip0: trip-point@0 { temperature = <45000>; hysteresis = <5000>; type = "active"; }; trip1: trip-point@1 { temperature = <50000>; hysteresis = <5000>; type = "active"; }; trip2: trip-point@2 { temperature = <55000>; hysteresis = <5000>; type = "active"; }; trip3: trip-point@3 { temperature = <60000>; hysteresis = <5000>; type = "active"; }; trip4: trip-point@4 { temperature = <65000>; hysteresis = <5000>; type = "active"; }; trip5: trip-point@5 { temperature = <70000>; hysteresis = <5000>; type = "active"; }; trip6: trip-point@6 { temperature = <75000>; hysteresis = <5000>; type = "active"; }; pcritical: trip-point@7 { temperature = <80000>; hysteresis = <1000>; type = "active"; }; }; cooling-maps { map0 { trip = <&trip0>; cooling-device = <&fan0 0 1>; contribution = <1024>; }; map1 { trip = <&trip1>; cooling-device = <&fan0 1 2>; contribution = <1024>; }; map2 { trip = <&trip2>; cooling-device = <&fan0 2 3>; contribution = <1024>; }; map3 { trip = <&trip3>; cooling-device = <&fan0 3 4>; contribution = <1024>; }; map4 { trip = <&trip4>; cooling-device = <&fan0 4 5>; contribution = <1024>; }; map5 { trip = <&trip5>; cooling-device = <&fan0 5 6>; contribution = <1024>; }; map6 { trip = <&trip6>; cooling-device = <&fan0 6 7>; contribution = <1024>; }; map7 { trip = <&pcritical>; cooling-device = <&fan0 7 8>; contribution = <1024>; }; }; }; &tsadc { status = "okay"; }; &display_subsystem { clocks = <&hdptxphy_hdmi0>; clock-names = "hdmi0_phy_pll"; route { route_hdmi0: route-hdmi0 { status = "okay"; logo,uboot = "logo.bmp"; logo,kernel = "logo_kernel.bmp"; logo,mode = "center"; charge_logo,mode = "center"; connect = <&vp0_out_hdmi0>; }; }; }; &hdptxphy_hdmi0 { status = "okay"; }; &hdmi0 { status = "okay"; cec-enable = "true"; }; &hdmi0_in_vp0 { status = "okay"; }; &hdmi0_in_vp1 { status = "disabled"; }; &hdmi0_in_vp2 { status = "disabled"; }; &hdmi0_sound { status = "okay"; }; /* Should work with at least 128MB cma reserved above. */ &hdmirx_ctrler { status = "okay"; #sound-dai-cells = <1>; /* Effective level used to trigger HPD: 0-low, 1-high */ hpd-trigger-level = <1>; hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_det>; pinctrl-names = "default"; }; &hdptxphy_hdmi0 { status = "okay"; }; &i2s5_8ch { status = "okay"; }; &i2s6_8ch { status = "okay"; }; &i2s7_8ch { status = "okay"; }; &vop { status = "okay"; }; &vop_mmu { status = "okay"; }; &vepu { status = "okay"; }; /* vp0 & vp1 splice for 8K output */ &vp0 { rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; rockchip,primary-plane = ; cursor-win-id = ; }; &vp1 { rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; rockchip,primary-plane = ; cursor-win-id = ; }; &vp2 { rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; rockchip,primary-plane = ; cursor-win-id = ; }; &vp3 { rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; rockchip,primary-plane = ; cursor-win-id = ; }; &u2phy2 { status = "okay"; }; &u2phy2_host { status = "okay"; }; &u2phy3 { status = "okay"; }; &u2phy3_host { status = "okay"; }; &usb_host0_ehci { status = "okay"; }; &usb_host0_ohci { status = "okay"; }; &usb_host1_ehci { status = "okay"; }; &usb_host1_ohci { status = "okay"; }; &usbhost3_0 { status = "okay"; }; &usbhost_dwc3_0 { status = "okay"; }; &combphy2_psu { status = "okay"; }; &u2phy1 { status = "okay"; }; &u2phy1_otg { status = "okay"; }; &usbdrd3_1{ status = "okay"; }; &usbdrd_dwc3_1{ status = "okay"; }; &usbdp_phy1 { status = "okay"; }; &usbdp_phy1_u3 { status = "okay"; }; &sata1{ ahci-supply = <&vcc5v0_sata>; status = "okay"; }; &i2c6 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c6m0_xfer>; usbc0: fusb302@22 { compatible = "fcs,fusb302"; reg = <0x22>; interrupt-parent = <&gpio0>; interrupts = ; //int-n-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&usbc0_int>; vbus-supply = <&usb5v0_typec0>; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; usbc0_role_sw: endpoint@0 { remote-endpoint = <&dwc3_0_role_switch>; }; }; }; usb_con: connector { compatible = "usb-c-connector"; label = "USB-C"; data-role = "host"; dr_mode = "host"; power-role = "dual"; try-power-role = "sink"; op-sink-microwatt = <1000000>; sink-pdos = ; source-pdos = ; altmodes { #address-cells = <1>; #size-cells = <0>; altmode@0 { reg = <0>; svid = <0xff01>; vdo = <0xffffffff>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; usbc0_orien_sw: endpoint { remote-endpoint = <&usbdp_phy0_orientation_switch>; }; }; port@1 { reg = <1>; dp_altmode_mux: endpoint { remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; }; }; }; }; }; }; &u2phy0 { status = "okay"; }; &u2phy0_otg { rockchip,typec-vbus-det; status = "okay"; }; &usbdrd3_0 { status = "okay"; }; &usbdrd_dwc3_0 { status = "okay"; dr_mode = "otg"; usb-role-switch; port { #address-cells = <1>; #size-cells = <0>; dwc3_0_role_switch: endpoint@0 { reg = <0>; remote-endpoint = <&usbc0_role_sw>; }; }; }; &usbdp_phy0 { status = "okay"; orientation-switch; svid = <0xff01>; sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; port { #address-cells = <1>; #size-cells = <0>; usbdp_phy0_orientation_switch: endpoint@0 { reg = <0>; remote-endpoint = <&usbc0_orien_sw>; }; usbdp_phy0_dp_altmode_mux: endpoint@1 { reg = <1>; remote-endpoint = <&dp_altmode_mux>; }; }; }; &usbdp_phy0_u3 { status = "okay"; }; &usbdp_phy0_dp { status = "okay"; }; &dp0 { status = "okay"; }; &dp0_in_vp2 { status = "okay"; }; &route_dp0 { status = "okay"; connect = <&vp2_out_dp0>; }; &spdif_tx2 { status = "okay"; }; &combphy1_ps { // pinctrl-names = "default"; // pinctrl-0 = <&sata1_pm_reset>; status = "okay"; }; &combphy0_ps { //rockchip,ext-refclk; //assigned-clock-rates = <100000000>; status = "okay"; }; &pcie30phy { //rockchip,ext-refclk; assigned-clock-rates = <100000000>; rockchip,pcie30-phymode = ; //4*pcie3.0x1 + 1* pcie2.0x1 status = "okay"; }; &pcie2x1l0 { /* 2.pcie30phy port0 lane1 */ max-link-speed = <3>; num-lanes = <1>; phys = <&pcie30phy>; //reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //checked //prsnt-gpios=<&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; status = "okay"; pcie@20 { reg = <0x00200000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; nvme1: pcie@20,0 { reg = <0x000000 0 0 0 0>; }; }; }; &pcie2x1l1 { /* 4.pcie30phy port1 lane1 */ max-link-speed = <3>; num-lanes = <1>; phys = <&pcie30phy>; reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; //checked //prsnt-gpios=<&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie30>; status = "okay"; pcie@30 { reg = <0x00300000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; rtl8125_0: pcie@30,0 { reg = <0x000000 0 0 0 0>; }; }; }; &pcie2x1l2 { //reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; prsnt-gpios=<&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie2x1l2>; phys = <&combphy0_ps PHY_TYPE_PCIE>; status = "okay"; pcie@40 { reg = <0x00400000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; rtl8125_1: pcie@40,0 { reg = <0x000000 0 0 0 0>; local-mac-address = [ 00 00 00 00 00 00 ]; }; }; }; &pcie3x4 { max-link-speed = <3>; reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; //prsnt-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie30>; status = "okay"; }; &pcie3x2 { /* 3.pcie30phy port1 lane0 */ max-link-speed = <3>; num-lanes = <1>; //reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //checked //prsnt-gpios=<&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; bus-scan-delay-ms = <30000>; delayed-auto; link_retries_count = <400>; vpcie3v3-supply = <&vcc3v3_pcie30>; status = "okay"; }; &pwm1 { pinctrl-names = "active"; pinctrl-0 = <&pwm1m1_pins>; status = "okay"; }; &i2c7 { status = "okay"; }; &i2s0_8ch { status = "okay"; rockchip,playback-channels = <2>; rockchip,capture-channels = <2>; #sound-dai-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&i2s0_lrck &i2s0_sclk &i2s0_sdi0 &i2s0_sdo0>; }; &rockchip_suspend { compatible = "rockchip,pm-rk3588"; status = "okay"; rockchip,sleep-debug-en = <1>; rockchip,sleep-mode-config = < (0 | RKPM_SLP_ARMOFF_DDRPD ) >; rockchip,wakeup-config = < (0 | RKPM_GPIO_WKUP_EN | RKPM_USB_WKUP_EN ) >; }; &avdd_0v75_s0 { regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <837500>; }; }; &avcc_1v8_s0 { regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; }; }; &vcc_1v8_s0 { regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; }; }; &vcc_3v3_s0 { regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <3300000>; }; }; &vdd_log_s0 { regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <750000>; }; }; &vdd_ddr_pll_s0 { regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <850000>; }; }; &gmac0 { status = "disabled"; }; /* &gmac1 { clock_in_out = "output"; phy-mode = "rgmii-rxid"; pinctrl-names = "default"; pinctrl-0 = <&gmac1_miim &gmac1_tx_bus2 &gmac1_rx_bus2 &gmac1_rgmii_clk &gmac1_rgmii_bus>; snps,reset-gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <0 15000 50000>; tx_delay = <0x42>; status = "okay"; fixed-link { speed = <1000>; full-duplex; }; };*/ /*&mdio1 { switch@29 { compatible = "realtek,rtl8365mb"; reg = <29>; reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; label = "wan"; }; port@1 { reg = <1>; label = "lan1"; }; port@2 { reg = <2>; label = "lan2"; }; port@3 { reg = <3>; label = "lan3"; }; port@4 { reg = <4>; label = "lan4"; }; port@5 { reg = <5>; label = "lan5"; }; port@7 { reg = <7>; ethernet = <&gmac1>; phy-mode = "rgmii"; tx-internal-delay-ps = <2000>; rx-internal-delay-ps = <0>; fixed-link { speed = <1000>; full-duplex; }; }; }; }; };*/ &pinctrl { usb { vcc5v0_otg_en: vcc5v0-otg-en { rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; }; }; phy-pwr { phy_pwr_en: phy-pwr-en { rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; }; }; usb-typec { usbc0_int: usbc0-int { rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; }; }; leds { led_pwr_en: led-pwr-en { rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; }; }; sd_pwr { sd_pwr_en_h: sd-pwr-en-h { rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; }; }; wwan_pwr { wwan_rst_en: wwan-rst-en { rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_output_high>; }; wwan_disable_h: wwan-disable-h { rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>; }; wwan_power_off_h: wwan-power-off-h { rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>; }; }; hdmirx { hdmirx_det: hdmirx-det { rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; }; }; pcie_wifi_h { pcie_wifi_enable_h: pcie_wifi_enable_h { rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_output_high>; }; }; sata { sata1_pwr_en: sata-pwr-en{ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_output_high>; }; sata1_pm_reset: sata1-pm-reset { rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_output_high>; }; }; };