// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2021 Rockchip Electronics Co., Ltd. * */ /dts-v1/; #include "dt-bindings/usb/pd.h" #include "rk3588.dtsi" #include #include #include #include #include #include #include #include "rk3588-rk806-single.dtsi" / { model = "RK3588 CoolPi CM5 EVB Board"; compatible = "rockchip,rk3588-core", "rockchip,rk3588"; aliases { mmc0 = &sdhci; mmc1 = &sdio; mmc2 = &sdmmc; serial0 = &uart2; serial1 = &uart9; serial2 = &uart6; serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; serial6 = &uart0; serial7 = &uart7; serial8 = &uart8; serial9 = &uart1; }; cspmu: cspmu@fd10c000 { compatible = "rockchip,cspmu"; reg = <0x0 0xfd10c000 0x0 0x1000>, <0x0 0xfd10d000 0x0 0x1000>, <0x0 0xfd10e000 0x0 0x1000>, <0x0 0xfd10f000 0x0 0x1000>, <0x0 0xfd12c000 0x0 0x1000>, <0x0 0xfd12d000 0x0 0x1000>, <0x0 0xfd12e000 0x0 0x1000>, <0x0 0xfd12f000 0x0 0x1000>; }; debug: debug@fd104000 { compatible = "rockchip,debug"; reg = <0x0 0xfd104000 0x0 0x1000>, <0x0 0xfd105000 0x0 0x1000>, <0x0 0xfd106000 0x0 0x1000>, <0x0 0xfd107000 0x0 0x1000>, <0x0 0xfd124000 0x0 0x1000>, <0x0 0xfd125000 0x0 0x1000>, <0x0 0xfd126000 0x0 0x1000>, <0x0 0xfd127000 0x0 0x1000>; }; fiq_debugger: fiq-debugger { compatible = "rockchip,fiq-debugger"; rockchip,serial-id = <9>; rockchip,wake-irq = <0>; /* If enable uart uses irq instead of fiq */ rockchip,irq-mode-enable = <1>; rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart2m0_xfer>; status = "disabled"; }; ramoops: ramoops@110000 { compatible = "ramoops"; reg = <0x0 0x110000 0x0 0xf0000>; record-size = <0x20000>; console-size = <0x80000>; ftrace-size = <0x00000>; pmsg-size = <0x50000>; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; cma { compatible = "shared-dma-pool"; reusable; reg = <0x0 (256 * 0x100000) 0x0 (128 * 0x100000)>; linux,cma-default; }; drm_logo: drm-logo@0 { compatible = "rockchip,drm-logo"; reg = <0x0 0x0 0x0 0x0>; }; drm_cubic_lut: drm-cubic-lut@0 { compatible = "rockchip,drm-cubic-lut"; reg = <0x0 0x0 0x0 0x0>; }; }; adc_keys: adc-keys { compatible = "adc-keys"; io-channels = <&saradc 1>; io-channel-names = "buttons"; keyup-threshold-microvolt = <1800000>; poll-interval = <100>; vol-up-key { label = "volume up"; linux,code = ; press-threshold-microvolt = <17000>; }; }; backlight: backlight { compatible = "pwm-backlight"; brightness-levels = < 0 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 32 33 33 34 34 35 35 36 36 37 37 38 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 >; default-brightness-level = <200>; }; hdmi0_sound: hdmi0-sound { status = "okay"; compatible = "rockchip,hdmi"; rockchip,mclk-fs = <128>; rockchip,card-name = "rockchip-hdmi0"; rockchip,cpu = <&i2s5_8ch>; rockchip,codec = <&hdmi0>; rockchip,jack-det; }; hdmi1_sound: hdmi1-sound { status = "okay"; compatible = "rockchip,hdmi"; rockchip,mclk-fs = <128>; rockchip,card-name = "rockchip-hdmi1"; rockchip,cpu = <&i2s6_8ch>; rockchip,codec = <&hdmi1>; rockchip,jack-det; }; dp0_sound: dp0-sound { status = "okay"; compatible = "rockchip,hdmi"; rockchip,card-name= "rockchip-dp0"; rockchip,mclk-fs = <512>; rockchip,cpu = <&spdif_tx2>; rockchip,codec = <&dp0 1>; rockchip,jack-det; }; dp1_sound: dp1-sound { status = "okay"; compatible = "rockchip,hdmi"; rockchip,card-name= "rockchip-dp1"; rockchip,mclk-fs = <512>; rockchip,cpu = <&spdif_tx5>; rockchip,codec = <&dp1 1>; rockchip,jack-det; }; panel-edp0 { compatible = "simple-panel"; backlight = <&backlight>; power-supply = <&vcc3v3_lcd>; prepare-delay-ms = <120>; enable-delay-ms = <120>; unprepare-delay-ms = <120>; disable-delay-ms = <120>; width-mm = <129>; height-mm = <171>; port { panel_in_edp0: endpoint { remote-endpoint = <&edp0_out_panel>; }; }; }; panel-edp1 { compatible = "simple-panel"; backlight = <&backlight>; power-supply = <&vcc3v3_lcd>; prepare-delay-ms = <120>; enable-delay-ms = <120>; unprepare-delay-ms = <120>; disable-delay-ms = <120>; width-mm = <129>; height-mm = <171>; port { panel_in_edp1: endpoint { remote-endpoint = <&edp1_out_panel>; }; }; }; vendor_storage_rm: vendor-storage-rm@0 { compatible = "rockchip,vendor-storage-rm"; reg = <0x0 0x0 0x0 0x0>; }; vendor_storage: vendor-storage { compatible = "rockchip,ram-vendor-storage"; memory-region = <&vendor_storage_rm>; status = "okay"; }; vcc3v3_lcd: vcc3v3-lcd { compatible = "regulator-fixed"; regulator-name = "vcc3v3_lcd"; enable-active-high; gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc3v3_sys>; pinctrl-names = "default"; pinctrl-0 = <&lcdpwr_en>; }; es8316_sound: es8316-sound { status = "okay"; compatible = "rockchip,multicodecs-card"; rockchip,card-name = "coolpi-es8316"; io-channels = <&saradc 3>; io-channel-names = "adc-detect"; keyup-threshold-microvolt = <1800000>; poll-interval = <100>; rockchip,pre-power-on-delay-ms = <30>; rockchip,post-power-down-delay-ms = <40>; rockchip,format = "i2s"; rockchip,mclk-fs = <256>; rockchip,cpu = <&i2s0_8ch>; rockchip,codec = <&es8316>; rockchip,audio-routing = "Headphone", "HPOL", "Headphone", "HPOR", "MIC2", "Headset Mic"; play-pause-key { label = "playpause"; linux,code = ; press-threshold-microvolt = <2000>; }; }; hdmiin-sound { compatible = "rockchip,hdmi"; rockchip,mclk-fs = <128>; rockchip,format = "i2s"; rockchip,bitclock-master = <&hdmirx_ctrler>; rockchip,frame-master = <&hdmirx_ctrler>; rockchip,card-name = "rockchip-hdmiin"; rockchip,cpu = <&i2s7_8ch>; rockchip,codec = <&hdmirx_ctrler 0>; rockchip,jack-det; }; leds: leds { status = "okay"; compatible = "gpio-leds"; led_act: led_act { label = "led-act"; gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; linux,default-trigger="heartbeat"; }; }; vcc12v_dcin: vcc12v-dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; }; vcc5v0_sys: vcc5v0-sys { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&vcc12v_dcin>; }; vcc3v3_sys: vcc3v3-sys { compatible = "regulator-fixed"; regulator-name = "vcc3v3_sys"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc12v_dcin>; }; vcc5v0_host: vcc5v0-host-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_host"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_sys>; pinctrl-names = "default"; pinctrl-0 = <&vcc5v0_host1_en>; }; vcc5v0_otg: vcc5v0-otg-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_otg"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-boot-on; regulator-always-on; enable-active-high; gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_sys>; pinctrl-names = "default"; pinctrl-0 = <&typec5v_pwren>; }; vcc_mipidphy0: vcc-mipi-dphy0 { compatible = "regulator-fixed"; regulator-name = "vcc_mipidphy0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-boot-on; regulator-always-on; enable-active-high; gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_sys>; pinctrl-names = "default"; pinctrl-0 = <&cam_en>; }; vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { compatible = "regulator-fixed"; regulator-name = "vcc_1v1_nldo_s3"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; vin-supply = <&vcc5v0_sys>; }; }; &cpu_l0 { cpu-supply = <&vdd_cpu_lit_s0>; mem-supply = <&vdd_cpu_lit_mem_s0>; }; &cpu_b0 { cpu-supply = <&vdd_cpu_big0_s0>; mem-supply = <&vdd_cpu_big0_mem_s0>; }; &cpu_b2 { cpu-supply = <&vdd_cpu_big1_s0>; mem-supply = <&vdd_cpu_big1_mem_s0>; }; &dfi { status = "okay"; }; &dmc { auto-freq-en = <1>; status = "okay"; }; &sdhci { bus-width = <8>; no-sdio; no-sd; non-removable; max-frequency = <200000000>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; status = "okay"; }; &sdmmc { max-frequency = <100000000>; no-sdio; no-mmc; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; disable-wp; sd-uhs-sdr104; vqmmc-supply = <&vccio_sd_s0>; status = "okay"; }; &dsi0 { status = "disabled"; dsi0_panel: panel@0 { status = "disabled"; compatible = "simple-panel-dsi"; reg = <0>; backlight = <&backlight>; reset-delay-ms = <10>; enable-delay-ms = <10>; prepare-delay-ms = <10>; unprepare-delay-ms = <10>; disable-delay-ms = <60>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>; dsi,format = ; dsi,lanes = <4>; panel-init-sequence = [ 05 78 01 11 05 00 01 29 ]; panel-exit-sequence = [ 05 00 01 28 05 00 01 10 ]; disp_timings0: display-timings { native-mode = <&dsi0_timing0>; dsi0_timing0: timing0 { clock-frequency = <132000000>; hactive = <1080>; vactive = <1920>; hfront-porch = <15>; hsync-len = <4>; hback-porch = <30>; vfront-porch = <15>; vsync-len = <2>; vback-porch = <15>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi: endpoint { remote-endpoint = <&dsi_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi_out_panel: endpoint { remote-endpoint = <&panel_in_dsi>; }; }; }; }; &dsi0_in_vp2 { status = "disabled"; }; &dsi0_in_vp3 { status = "disabled"; }; &route_dsi0 { status = "disabled"; connect = <&vp3_out_dsi0>; }; &dsi1 { status = "disabled"; dsi1_panel: panel@0 { status = "disabled"; compatible = "simple-panel-dsi"; reg = <0>; backlight = <&backlight>; reset-delay-ms = <10>; enable-delay-ms = <10>; prepare-delay-ms = <10>; unprepare-delay-ms = <10>; disable-delay-ms = <10>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>; dsi,format = ; dsi,lanes = <4>; panel-init-sequence = [ 05 78 01 11 05 00 01 29 ]; panel-exit-sequence = [ 05 00 01 28 05 00 01 10 ]; disp_timings1: display-timings { native-mode = <&dsi1_timing0>; dsi1_timing0: timing0 { clock-frequency = <132000000>; hactive = <1080>; vactive = <1920>; hfront-porch = <15>; hsync-len = <4>; hback-porch = <30>; vfront-porch = <15>; vsync-len = <2>; vback-porch = <15>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi1: endpoint { remote-endpoint = <&dsi1_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi1_out_panel: endpoint { remote-endpoint = <&panel_in_dsi1>; }; }; }; }; &dsi1_in_vp2 { status = "disabled"; }; &dsi1_in_vp3 { status = "disabled"; }; &route_dsi1 { status = "disabled"; connect = <&vp3_out_dsi1>; }; &gpu { mali-supply = <&vdd_gpu_s0>; mem-supply = <&vdd_gpu_mem_s0>; status = "okay"; }; &iep { status = "okay"; }; &iep_mmu { status = "okay"; }; &jpegd { status = "okay"; }; &jpegd_mmu { status = "okay"; }; &jpege_ccu { status = "okay"; }; &jpege0 { status = "okay"; }; &jpege0_mmu { status = "okay"; }; &jpege1 { status = "okay"; }; &jpege1_mmu { status = "okay"; }; &jpege2 { status = "okay"; }; &jpege2_mmu { status = "okay"; }; &jpege3 { status = "okay"; }; &jpege3_mmu { status = "okay"; }; &mpp_srv { status = "okay"; }; &rga3_core0 { status = "okay"; }; &rga3_0_mmu { status = "okay"; }; &rga3_core1 { status = "okay"; }; &rga3_1_mmu { status = "okay"; }; &rga2 { status = "okay"; }; &rknpu { rknpu-supply = <&vdd_npu_s0>; mem-supply = <&vdd_npu_mem_s0>; status = "okay"; }; &rknpu_mmu { status = "okay"; }; &rkvdec_ccu { status = "okay"; }; &rkvdec0 { status = "okay"; }; &rkvdec0_mmu { status = "okay"; }; &rkvdec1 { status = "okay"; }; &rkvdec1_mmu { status = "okay"; }; &rkvenc_ccu { status = "okay"; }; &rkvenc0 { status = "okay"; }; &rkvenc0_mmu { status = "okay"; }; &rkvenc1 { status = "okay"; }; &rkvenc1_mmu { status = "okay"; }; &rockchip_suspend { status = "okay"; rockchip,sleep-debug-en = <1>; }; &saradc { status = "okay"; vref-supply = <&vcc_1v8_s0>; }; &tsadc { status = "okay"; }; &u2phy0 { status = "okay"; }; &u2phy1 { status = "okay"; }; &u2phy2 { status = "okay"; }; &u2phy3 { status = "okay"; }; &u2phy0_otg { vbus-supply = <&vcc5v0_otg>; status = "okay"; }; &u2phy1_otg { phy-supply = <&vcc5v0_host>; status = "okay"; }; &u2phy2_host { phy-supply = <&vcc5v0_host>; status = "okay"; }; &u2phy3_host { phy-supply = <&vcc5v0_host>; status = "okay"; }; &usb_host0_ehci { status = "okay"; }; &usb_host0_ohci { status = "okay"; }; &usb_host1_ehci { status = "okay"; }; &usb_host1_ohci { status = "okay"; }; &usbdp_phy0 { rockchip,dp-lane-mux = < 0 1 >; status = "okay"; }; &usbdp_phy0_dp { status = "okay"; }; &usbdp_phy0_u3 { status = "okay"; }; &usbdp_phy1 { rockchip,dp-lane-mux = < 2 3 >; status = "okay"; }; &usbdp_phy1_dp { status = "okay"; }; &usbdp_phy1_u3 { status = "okay"; }; &usbdrd3_0 { status = "okay"; }; &usbdrd_dwc3_0 { dr_mode = "host"; status = "okay"; }; &usbdrd3_1 { status = "okay"; }; &usbdrd_dwc3_1 { status = "okay"; }; &vdpu { status = "okay"; }; &vdpu_mmu { status = "okay"; }; &vop { status = "okay"; }; &vop_mmu { status = "okay"; }; /* vp0 & vp1 splice for 8K output */ &vp0 { cursor-win-id=; rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; rockchip,primary-plane = ; }; &vp1 { cursor-win-id=; rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; rockchip,primary-plane = ; }; &vp2 { cursor-win-id=; rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; rockchip,primary-plane = ; }; &vp3 { cursor-win-id=; rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; rockchip,primary-plane = ; }; &backlight { pwms = <&pwm2 0 25000 0>; enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&bl_en>; status = "okay"; }; &gmac0 { /* Use rgmii-rxid mode to disable rx delay inside Soc */ phy-mode = "rgmii-rxid"; clock_in_out = "output"; snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; snps,reset-active-low; /* Reset time is 20ms, 100ms for rtl8211f */ snps,reset-delays-us = <0 20000 100000>; pinctrl-names = "default"; pinctrl-0 = <&gmac0_miim &gmac0_tx_bus2 &gmac0_rx_bus2 &gmac0_rgmii_clk &gmac0_rgmii_bus>; tx_delay = <0x44>; /* rx_delay = <0x3f>; */ phy-handle = <&rgmii_phy>; status = "okay"; }; &hdmi0 { enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; status = "disabled"; }; &hdmi0_in_vp0 { status = "okay"; }; &route_hdmi0 { status = "okay"; logo,uboot = "logo.bmp"; logo,kernel = "logo_kernel.bmp"; logo,mode = "center"; charge_logo,mode = "center"; connect = <&vp0_out_hdmi0>; }; &hdptxphy_hdmi0 { status = "okay"; }; &hdmi1 { enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda>; status = "disabled"; }; &hdmi1_in_vp1 { status = "okay"; }; &route_hdmi1 { status = "okay"; logo,uboot = "logo.bmp"; logo,kernel = "logo_kernel.bmp"; logo,mode = "center"; charge_logo,mode = "center"; connect = <&vp1_out_hdmi1>; }; &hdptxphy_hdmi1 { status = "okay"; }; &dp0 { pinctrl-names = "default"; pinctrl-0 = <&dp0m2_pins>; status = "disabled"; ports { port@1 { reg = <1>; edp0_out_panel: endpoint { remote-endpoint = <&panel_in_edp0>; }; }; }; }; &dp0_in_vp2 { status = "okay"; }; &dp1 { pinctrl-names = "default"; pinctrl-0 = <&dp1m2_pins>; status = "disabled"; ports { port@1 { reg = <1>; edp1_out_panel: endpoint { remote-endpoint = <&panel_in_edp1>; }; }; }; }; &dp1_in_vp2 { status = "okay"; }; /* Should work with at least 128MB cma reserved above. */ &hdmirx_ctrler { status = "disabled"; #sound-dai-cells = <1>; /* Effective level used to trigger HPD: 0-low, 1-high */ hpd-trigger-level = <1>; hdmirx-det-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&hdmim1_rx &hdmirx_det>; }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c0m2_xfer>; vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { compatible = "rockchip,rk8602"; reg = <0x42>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "rk860x-reg"; regulator-name = "vdd_cpu_big0_s0"; regulator-min-microvolt = <550000>; regulator-max-microvolt = <1050000>; regulator-ramp-delay = <2300>; rockchip,suspend-voltage-selector = <1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-off-in-suspend; }; }; vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { compatible = "rockchip,rk8603"; reg = <0x43>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "rk860x-reg"; regulator-name = "vdd_cpu_big1_s0"; regulator-min-microvolt = <550000>; regulator-max-microvolt = <1050000>; regulator-ramp-delay = <2300>; rockchip,suspend-voltage-selector = <1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-off-in-suspend; }; }; }; &i2c2 { status = "okay"; vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { compatible = "rockchip,rk8602"; reg = <0x42>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "rk860x-reg"; regulator-name = "vdd_npu_s0"; regulator-min-microvolt = <550000>; regulator-max-microvolt = <950000>; regulator-ramp-delay = <2300>; rockchip,suspend-voltage-selector = <1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-off-in-suspend; }; }; }; &i2c6 { status = "okay"; hym8563: hym8563@51 { compatible = "haoyu,hym8563"; reg = <0x51>; #clock-cells = <0>; clock-frequency = <32768>; clock-output-names = "hym8563"; pinctrl-names = "default"; pinctrl-0 = <&hym8563_int>; interrupt-parent = <&gpio0>; interrupts = ; wakeup-source; }; }; &i2c7 { status = "okay"; es8316: es8316@10 { status = "okay"; #sound-dai-cells = <0>; compatible = "everest,es8316"; reg = <0x10>; clocks = <&mclkout_i2s0>; clock-names = "mclk"; assigned-clocks = <&mclkout_i2s0>; assigned-clock-rates = <12288000>; pinctrl-names = "default"; pinctrl-0 = <&i2s0_mclk>; }; }; &i2s0_8ch { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2s0_lrck &i2s0_sclk &i2s0_sdi0 &i2s0_sdo0>; }; &spdif_tx2 { status = "okay"; }; &spdif_tx5 { status = "okay"; }; &i2s5_8ch { status = "okay"; }; &i2s6_8ch { status = "okay"; }; &i2s7_8ch { status = "okay"; }; &mdio0 { rgmii_phy: phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x1>; }; }; &mipi_dcphy0 { status = "disabled"; }; &mipi_dcphy1 { status = "disabled"; }; &pcie30phy { rockchip,pcie30-phymode = ; status = "disabled"; }; &combphy0_ps { status = "okay"; }; &combphy1_ps { status = "okay"; }; &combphy2_psu { status = "okay"; }; //ethernet &pcie2x1l2 { reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_sys>; pinctrl-names = "default"; pinctrl-0 = <&rtl8111_isolate>; status = "okay"; }; //wifi &pcie2x1l1 { reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_sys>; pinctrl-names = "default"; pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron &bt_pwron>; status = "disabled"; }; &sata1 { status = "disabled"; }; //ssd &pcie3x4 { num-lanes = <2>; reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_sys>; status = "disabled"; }; //express &pcie3x2 { reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_sys>; status = "disabled"; }; &pwm2 { status = "okay"; }; &uart2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart2m0_xfer>; }; &display_subsystem { memory-region = <&drm_logo>; memory-region-names = "drm-logo"; }; &rng { status = "okay"; }; &sfc { status = "okay"; max-freq = <50000000>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&fspim2_pins>; spi_flash: spi-flash@0 { #address-cells = <1>; #size-cells = <0>; compatible = "jedec,spi-nor"; reg = <0x0>; spi-max-frequency = <50000000>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; status = "okay"; }; }; &pinctrl { hym8563 { hym8563_int: hym8563-int { rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; rtl8111 { rtl8111_isolate: rtl8111-isolate { rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; usb { vcc5v0_host1_en: vcc5v0-host1-en { rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; usb-typec { typec5v_pwren: typec5v-pwren { rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; hdmi { hdmirx_det: hdmirx-det { rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; wifi { pcie_rst: pcie-rst { rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; }; pcie_clkreq: pcie-clkreq { rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; }; pcie_wake: pcie-wake { rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; }; wifi_pwron: wifi-pwron { rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; }; bt_pwron: bt-pwron { rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; }; }; lcd { lcdpwr_en: lcdpwr-en { rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; }; bl_en: bl-en { rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; cam { cam_en: cam-en { rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_output_high>; }; }; };