// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2022 Mixtile Limited
 *
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/display/rockchip_vop.h>
#include <dt-bindings/sensor-dev.h>

#include "dt-bindings/usb/pd.h"
#include "rk3588.dtsi"
#include "rk3588-rk806-single.dtsi"
#include "rk3588-linux.dtsi"

/ {
	model = "Mixtile Blade 3 v1.0.1";
	compatible = "rockchip,rk3588-blade3-v101-linux", "rockchip,rk3588";
	/delete-node/ chosen;

	/* If hdmirx node is disabled, delete the reserved-memory node here. */
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/* Reserve 256MB memory for hdmirx-controller@fdee0000 */
		cma {
			compatible = "shared-dma-pool";
			reusable;
			reg = <0x0 (256 * 0x100000) 0x0 (256 * 0x100000)>;
			linux,cma-default;
		};
	};

	hdmiin-sound {
		compatible = "rockchip,hdmi";
		rockchip,mclk-fs = <128>;
		rockchip,format = "i2s";
		rockchip,bitclock-master = <&hdmirx_ctrler>;
		rockchip,frame-master = <&hdmirx_ctrler>;
		rockchip,card-name = "rockchip-hdmiin";
		rockchip,cpu = <&i2s7_8ch>;
		rockchip,codec = <&hdmirx_ctrler 0>;
		rockchip,jack-det;
	};

	hdmi0_sound: hdmi0-sound {
		status = "okay";
		compatible = "rockchip,hdmi";
		rockchip,mclk-fs = <128>;
		rockchip,card-name = "rockchip-hdmi0";
		rockchip,cpu = <&i2s5_8ch>;
		rockchip,codec = <&hdmi0>;
		rockchip,jack-det;
	};

	dp0_sound: dp0-sound {
		status = "okay";
		compatible = "rockchip,hdmi";
		rockchip,card-name = "rockchip-dp0";
		rockchip,mclk-fs = <512>;
		rockchip,cpu = <&spdif_tx2>;
		rockchip,codec = <&dp0 1>;
		rockchip,jack-det;
	};

	dp1_sound: dp1-sound {
		status = "okay";
		compatible = "rockchip,hdmi";
		rockchip,card-name = "rockchip-dp1";
		rockchip,mclk-fs = <512>;
		rockchip,cpu = <&spdif_tx5>;
		rockchip,codec = <&dp1 1>;
		rockchip,jack-det;
	};

	pcie20_avdd0v85: pcie20-avdd0v85 {
		compatible = "regulator-fixed";
		regulator-name = "pcie20_avdd0v85";
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <850000>;
		regulator-max-microvolt = <850000>;
		vin-supply = <&vdd_0v85_s0>;
	};

	pcie20_avdd1v8: pcie20-avdd1v8 {
		compatible = "regulator-fixed";
		regulator-name = "pcie20_avdd1v8";
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		vin-supply = <&avcc_1v8_s0>;
	};

	pcie30_avdd0v75: pcie30-avdd0v75 {
		compatible = "regulator-fixed";
		regulator-name = "pcie30_avdd0v75";
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <750000>;
		regulator-max-microvolt = <750000>;
		vin-supply = <&avdd_0v75_s0>;
	};

	pcie30_avdd1v8: pcie30-avdd1v8 {
		compatible = "regulator-fixed";
		regulator-name = "pcie30_avdd1v8";
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		vin-supply = <&avcc_1v8_s0>;
	};

	vcc3v3_pcie30: vcc3v3-pcie30 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3_pcie30";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
		gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <5000>;
		vin-supply = <&vcc12v_dcin>;
	};

	vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
		compatible = "regulator-fixed";
		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&sd_s0_pwr>;
		regulator-name = "vcc_3v3_sd_s0";
		enable-active-high;
	};

	vbus5v0_typec0: vbus5v0-typec0 {
		compatible = "regulator-fixed";
		regulator-name = "vbus5v0_typec0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
		vin-supply = <&vcc5v0_usb>;
		pinctrl-names = "default";
		pinctrl-0 = <&typec5v_pwren0>;
	};

	vbus5v0_typec1: vbus5v0-typec1 {
		compatible = "regulator-fixed";
		regulator-name = "vbus5v0_typec1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
		vin-supply = <&vcc5v0_usb>;
		pinctrl-names = "default";
		pinctrl-0 = <&typec5v_pwren1>;
	};

	vcc12v_dcin: vcc12v-dcin {
		compatible = "regulator-fixed";
		regulator-name = "vcc12v_dcin";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
	};

	vcc5v0_sys: vcc5v0-sys {
		compatible = "regulator-fixed";
		regulator-name = "vcc5v0_sys";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vcc12v_dcin>;
	};

	vcc5v0_usbdcin: vcc5v0-usbdcin {
		compatible = "regulator-fixed";
		regulator-name = "vcc5v0_usbdcin";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vcc12v_dcin>;
	};

	vcc5v0_usb: vcc5v0-usb {
		compatible = "regulator-fixed";
		regulator-name = "vcc5v0_usb";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vcc5v0_usbdcin>;
	};

	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_1v1_nldo_s3";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <1100000>;
		regulator-max-microvolt = <1100000>;
		vin-supply = <&vcc5v0_sys>;
	};

	fan: pwm-fan {
		compatible = "pwm-fan";

		interrupt-parent = <&gpio3>;
		interrupts = <RK_PB1 IRQ_TYPE_EDGE_FALLING>;
		pulses-per-revolution = <2>;

		#cooling-cells = <2>;
		pwms = <&pwm8 0 250000 0>;
		cooling-levels = <0 35 70 100 125 150>;
		rockchip,temp-trips = <
			30000   1
			45000   2
			50000   3
			55000   4
			60000   5
		>;
    };
};

/*&pwrkey {
	status = "disabled";
};*/

&av1d {
	status = "okay";
};

&av1d_mmu {
	status = "okay";
};

&cpu_l0 {
	cpu-supply = <&vdd_cpu_lit_s0>;
	mem-supply = <&vdd_cpu_lit_mem_s0>;
};

&cpu_b0 {
	cpu-supply = <&vdd_cpu_big0_s0>;
	mem-supply = <&vdd_cpu_big0_mem_s0>;
};

&cpu_b2 {
	cpu-supply = <&vdd_cpu_big1_s0>;
	mem-supply = <&vdd_cpu_big1_mem_s0>;
};

&gpu {
	mali-supply = <&vdd_gpu_s0>;
	mem-supply = <&vdd_gpu_mem_s0>;
	status = "okay";
};

&i2s0_8ch {
	status = "okay";
	pinctrl-0 = <&i2s0_lrck
		     &i2s0_sclk
		     &i2s0_sdi0
		     &i2s0_sdo0>;
};

&i2s7_8ch {
	status = "okay";
};

&i2s5_8ch {
	status = "okay";
};

&iep {
	status = "okay";
};

&iep_mmu {
	status = "okay";
};

&jpegd {
	status = "okay";
};

&jpegd_mmu {
	status = "okay";
};

&jpege_ccu {
	status = "okay";
};

&jpege0 {
	status = "okay";
};

&jpege0_mmu {
	status = "okay";
};

&jpege1 {
	status = "okay";
};

&jpege1_mmu {
	status = "okay";
};

&jpege2 {
	status = "okay";
};

&jpege2_mmu {
	status = "okay";
};

&jpege3 {
	status = "okay";
};

&jpege3_mmu {
	status = "okay";
};

&mpp_srv {
	status = "okay";
};

&rga3_core0 {
	status = "okay";
};

&rga3_0_mmu {
	status = "okay";
};

&rga3_core1 {
	status = "okay";
};

&rga3_1_mmu {
	status = "okay";
};

&rga2 {
	status = "okay";
};

&rknpu {
	rknpu-supply = <&vdd_npu_s0>;
	mem-supply = <&vdd_npu_mem_s0>;
	status = "okay";
};

&rknpu_mmu {
	status = "okay";
};

&rkvdec_ccu {
	status = "okay";
};

&rkvdec0 {
	status = "okay";
};

&rkvdec0_mmu {
	status = "okay";
};

&rkvdec1 {
	status = "okay";
};

&rkvdec1_mmu {
	status = "okay";
};

&rkvenc_ccu {
	status = "okay";
};

&rkvenc0 {
	status = "okay";
};

&rkvenc0_mmu {
	status = "okay";
};

&rkvenc1 {
	status = "okay";
};

&rkvenc1_mmu {
	status = "okay";
};

&rockchip_suspend {
	status = "okay";
	rockchip,sleep-debug-en = <1>;
	rockchip,sleep-mode-config = <0x4000024>;
};

&saradc {
	status = "okay";
	vref-supply = <&vcc_1v8_s0>;
};

&sdhci {
	bus-width = <8>;
	no-sdio;
	no-sd;
	non-removable;
	max-frequency = <200000000>;
	mmc-hs400-1_8v;
	mmc-hs400-enhanced-strobe;
	status = "okay";
};

&sdmmc {
	max-frequency = <150000000>;
	no-sdio;
	no-mmc;
	bus-width = <4>;
	cap-mmc-highspeed;
	cap-sd-highspeed;
	disable-wp;
	sd-uhs-sdr104;
	vmmc-supply = <&vcc_3v3_sd_s0>;
	vqmmc-supply = <&vccio_sd_s0>;
	status = "okay";
};

&tsadc {
	status = "okay";
};

&u2phy0 {
	status = "okay";
};

&u2phy1 {
	status = "okay";
};

&u2phy2 {
	status = "okay";
};

&u2phy3 {
	status = "okay";
};

&u2phy0_otg {
	status = "okay";
	rockchip,typec-vbus-det;
};

&u2phy1_otg {
	status = "okay";
	rockchip,typec-vbus-det;
};

&u2phy2_host { // 30PIN GPIO
	status = "okay";
};

&u2phy3_host {
	status = "okay";
};

&usb_host0_ehci {
	status = "okay";
};

&usb_host0_ohci {
	status = "okay";
};

&usb_host1_ehci {
	status = "okay";
};

&usb_host1_ohci {
	status = "okay";
};

&usbhost3_0 { // miniPCIe combo
	status = "disable";
};

&usbhost_dwc3_0 { // miniPCIe combo
	status = "disable";
};

&usbdp_phy0 {
	status = "okay";

	orientation-switch;
	svid = <0xff01>;
	sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
	sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;

	port {
		#address-cells = <1>;
		#size-cells = <0>;
		usbdp_phy0_orientation_switch: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&usbc0_orien_sw>;
		};

		usbdp_phy0_dp_altmode_mux: endpoint@1 {
			reg = <1>;
			remote-endpoint = <&dp0_altmode_mux>;
		};
	};
};

&usbdp_phy0_dp {
	status = "okay";
};

&usbdp_phy0_u3 {
	status = "okay";
};

&usbdp_phy1 {
	status = "okay";

	orientation-switch;
	svid = <0xff01>;	// linux/usb/typec_dp.h:USB_TYPEC_DP_SID
	sbu1-dc-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
	sbu2-dc-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;

	port {
		#address-cells = <1>;
		#size-cells = <0>;
		usbdp_phy1_orientation_switch: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&usbc1_orien_sw>;
		};

		usbdp_phy1_dp_altmode_mux: endpoint@1 {
			reg = <1>;
			remote-endpoint = <&dp1_altmode_mux>;
		};
	};
};

&usbdp_phy1_dp {
	status = "okay";
};

&usbdp_phy1_u3 {
	maximum-speed = "high-speed";
	status = "okay";
};

&usbdrd3_0 {
	status = "okay";
};

&usbdrd_dwc3_0 {
	dr_mode = "otg";
	status = "okay";

	usb-role-switch;
	port {
		#address-cells = <1>;
		#size-cells = <0>;
		dwc3_0_role_switch: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&usbc0_role_sw>;
		};
	};
};

&usbdrd3_1 {
	status = "okay";
};

&usbdrd_dwc3_1 {
	status = "okay";

	dr_mode = "otg";
	usb-role-switch;
	port {
		#address-cells = <1>;
		#size-cells = <0>;
		dwc3_1_role_switch: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&usbc1_role_sw>;
		};
	};
};

&vdpu {
	status = "okay";
};

&vdpu_mmu {
	status = "okay";
};

&vop {
	assigned-clocks = <&cru ACLK_VOP>;
	assigned-clock-rates = <800000000>;
	status = "okay";
};

&vop_mmu {
	status = "okay";
};

/* vp0 & vp1 splice for 8K output */
&vp0 {
	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
	rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER0>;
	cursor-win-id = <ROCKCHIP_VOP2_ESMART0>;
};

&vp1 {
	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
	rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER1>;
	cursor-win-id = <ROCKCHIP_VOP2_ESMART1>;
};

&vp2 {
	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
	rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER2>;
	cursor-win-id = <ROCKCHIP_VOP2_ESMART2>;
};

&vp3 {
	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
	rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER3>;
	cursor-win-id = <ROCKCHIP_VOP2_ESMART3>;
};

&combphy0_ps {
	status = "okay";
};

&combphy1_ps {
	status = "okay";
};

&combphy2_psu {
	status = "okay";
};

&dp0 {
	status = "okay";
};

&dp0_in_vp1 {
	status = "okay";
};

&spdif_tx2 {
    status = "okay";
};

&dp1 {
	status = "okay";
};

&dp1_in_vp2 {
	status = "okay";
};

&spdif_tx5 {
    status = "okay";
};

&hdmi0 {
	enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
	status = "okay";
	cec-enable = "true";
};

&hdmi0_in_vp0 {
	status = "okay";
};

/* Should work with at least 128MB cma reserved above. */
&hdmirx_ctrler {
	status = "okay";

	#sound-dai-cells = <1>;
	/* Effective level used to trigger HPD: 0-low, 1-high */
	hpd-trigger-level = <1>;
	hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;

	pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_det>;
	pinctrl-names = "default";
};

&hdptxphy_hdmi0 {
	status = "okay";
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0m2_xfer>;

	vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
		compatible = "rockchip,rk8602";
		reg = <0x42>;
		vin-supply = <&vcc5v0_sys>;
		regulator-compatible = "rk860x-reg";
		regulator-name = "vdd_cpu_big0_s0";
		regulator-min-microvolt = <550000>;
		regulator-max-microvolt = <1050000>;
		regulator-ramp-delay = <2300>;
		rockchip,suspend-voltage-selector = <1>;
		regulator-boot-on;
		regulator-always-on;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};

	vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
		compatible = "rockchip,rk8603";
		reg = <0x43>;
		vin-supply = <&vcc5v0_sys>;
		regulator-compatible = "rk860x-reg";
		regulator-name = "vdd_cpu_big1_s0";
		regulator-min-microvolt = <550000>;
		regulator-max-microvolt = <1050000>;
		regulator-ramp-delay = <2300>;
		rockchip,suspend-voltage-selector = <1>;
		regulator-boot-on;
		regulator-always-on;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};
};

&i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1m2_xfer>;

	vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
		compatible = "rockchip,rk8602";
		reg = <0x42>;
		vin-supply = <&vcc5v0_sys>;
		regulator-compatible = "rk860x-reg";
		regulator-name = "vdd_npu_s0";
		regulator-min-microvolt = <550000>;
		regulator-max-microvolt = <950000>;
		regulator-ramp-delay = <2300>;
		rockchip,suspend-voltage-selector = <1>;
		regulator-boot-on;
		regulator-always-on;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};

	usbc1: fusb302@22 {
		compatible = "fcs,fusb302";
		reg = <0x22>;
		interrupt-parent = <&gpio0>;
		interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&usbc1_int>;
		vbus-supply = <&vbus5v0_typec1>;
		status = "okay";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				usbc1_role_sw: endpoint@0 {
					remote-endpoint = <&dwc3_1_role_switch>;
				};
			};
		};

		usb_con1: connector {
			compatible = "usb-c-connector";
			label = "USB-C";
			data-role = "dual";
			power-role = "dual";
			try-power-role = "sink";
			faster-pd-negotiation;
			op-sink-microwatt = <15000000>;
			sink-pdos =
				// <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
				<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)
				PDO_VAR(5000, 20000, 1000)
				PDO_PPS_APDO(5000, 20000, 1000)>;
			source-pdos =
				<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;

			altmodes {
				#address-cells = <1>;
				#size-cells = <0>;

				altmode@0 {
					reg = <0>;
					svid = <0xff01>;
					vdo = <0xffffffff>;
				};
			};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					usbc1_orien_sw: endpoint {
						remote-endpoint = <&usbdp_phy1_orientation_switch>;
					};
				};

				port@1 {
					reg = <1>;
					dp1_altmode_mux: endpoint {
						remote-endpoint = <&usbdp_phy1_dp_altmode_mux>;
					};
				};
			};
		};
	};
};

&i2c4 { // U.2 port
	status = "okay";
	pinctrl-0 = <&i2c4m0_xfer>;
};

&i2c6 { // USB Type-C 0
	status = "okay";
	pinctrl-0 = <&i2c6m0_xfer>;

	usbc0: fusb302@22 {
		compatible = "fcs,fusb302";
		reg = <0x22>;
		interrupt-parent = <&gpio0>;
		interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&usbc0_int>;
		vbus-supply = <&vbus5v0_typec0>;
		status = "okay";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				usbc0_role_sw: endpoint@0 {
					remote-endpoint = <&dwc3_0_role_switch>;
				};
			};
		};

		usb_con0: connector {
			compatible = "usb-c-connector";
			label = "USB-C";
			data-role = "dual";
			power-role = "dual";
			try-power-role = "sink";
			op-sink-microwatt = <1000000>;
			sink-pdos =
				<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
			source-pdos =
				<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;

			altmodes {
				#address-cells = <1>;
				#size-cells = <0>;

				altmode@0 {
					reg = <0>;
					svid = <0xff01>;
					vdo = <0xffffffff>;
				};
			};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					usbc0_orien_sw: endpoint {
						remote-endpoint = <&usbdp_phy0_orientation_switch>;
					};
				};

				port@1 {
					reg = <1>;
					dp0_altmode_mux: endpoint {
						remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
					};
				};
			};
		};
	};
};

&i2c5 { // 30PIN GPIO
	status = "okay";
	pinctrl-0 = <&i2c5m3_xfer>;
};

&pwm8 { // 30PIN GPIO
    pinctrl-names = "active";
	status = "okay";
	pinctrl-0 = <&pwm8m2_pins>;
};

&pwm14 { // 30PIN GPIO
	status = "okay";
	pinctrl-0 = <&pwm14m2_pins>;
};

&pwm15 { // 30PIN GPIO
	status = "disabled";
	pinctrl-0 = <&pwm15m3_pins>;
};

&spi4 { // 30PIN GPIO
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&spi4m2_cs0 &spi4m2_pins>;
	num-cs = <1>;
};

&i2s2_2ch { // 30PIN GPIO
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&i2s2m1_mclk
				 &i2s2m1_lrck
			     &i2s2m1_sclk
			     &i2s2m1_sdi
			     &i2s2m1_sdo>;
};

&can2 { // 30PIN GPIO
	status = "okay";
};

&pcie2x1l0 { // combphy1, to ASM1182e
	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&pcie2x1l1 { // combphy2, to miniPCIe socket
	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>; /* P1:PCIe3x2  +  P0:PCIe3x2 */
status = "okay";
};

&pcie3x4 {
    reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
    vpcie3v3-supply = <&vcc3v3_pcie30>;
    status = "okay";
};

&pinctrl {
	sdmmc {
		sd_s0_pwr: sd-s0-pwr {
			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	usb {
		vcc5v0_host_en: vcc5v0-host-en {
			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	hdmirx {
		hdmirx_det: hdmirx-det {
			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	usb-typec {
		usbc0_int: usbc0-int {
			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
		};

		usbc1_int: usbc1-int {
			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
		};

		typec5v_pwren0: typec5v-pwren0 {
			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		typec5v_pwren1: typec5v-pwren1 {
			rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

&route_hdmi0 {
	status = "okay";
};

&sata0 {
	status = "okay";
};

&hdptxphy_hdmi0 {
	status = "okay";
};

&hdptxphy_hdmi1 {
	status = "okay";
};

&display_subsystem {
	clocks = <&hdptxphy_hdmi0>, <&hdptxphy_hdmi1>;
	clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
};