// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2024 Rockchip Electronics Co., Ltd. * */ #include "rk3576-evb.dtsi" #include "rk3576-rk806.dtsi" / { panel-edp { compatible = "simple-panel"; backlight = <&backlight>; power-supply = <&vcc3v3_lcd_n>; prepare-delay-ms = <120>; enable-delay-ms = <120>; unprepare-delay-ms = <120>; disable-delay-ms = <120>; width-mm = <120>; height-mm = <160>; status = "okay"; panel-timing { clock-frequency = <200000000>; hactive = <1536>; vactive = <2048>; hfront-porch = <12>; hsync-len = <16>; hback-porch = <48>; vfront-porch = <8>; vsync-len = <4>; vback-porch = <8>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; port { panel_in_edp: endpoint { remote-endpoint = <&edp_out_panel>; }; }; }; sdio_pwrseq: sdio-pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; pinctrl-0 = <&wifi_poweren_gpio>; /* * On the module itself this is one of these (depending * on the actual card populated): * - SDIO_RESET_L_WL_REG_ON * - PDN (power down when low) */ post-power-on-delay-ms = <200>; reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>; }; vcc_1v8_s0: vcc-1v8-s0 { compatible = "regulator-fixed"; regulator-name = "vcc_1v8_s0"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; vin-supply = <&vcc_1v8_s3>; }; vcc_3v3_s0: vcc-3v3-s0 { compatible = "regulator-fixed"; regulator-name = "vcc_3v3_s0"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc_3v3_s3>; }; vcc_ufs_s0: vcc-ufs-s0 { compatible = "regulator-fixed"; regulator-name = "vcc_ufs_s0"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc_sys>; }; vcc1v8_ufs_vccq2_s0: vcc1v8-ufs-vccq2-s0 { compatible = "regulator-fixed"; regulator-name = "vcc1v8_ufs_vccq2_s0"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; vin-supply = <&vcc_1v8_s3>; }; vcc1v2_ufs_vccq_s0: vcc1v2-ufs-vccq-s0 { compatible = "regulator-fixed"; regulator-name = "vcc1v2_ufs_vccq_s0"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; vin-supply = <&vcc_sys>; }; vcc3v3_dp: vcc3v3-dp { compatible = "regulator-fixed"; regulator-name = "vcc3v3_dp"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc_3v3_s3>; }; vcc3v3_lcd_n: vcc3v3-lcd0-n { compatible = "regulator-fixed"; regulator-name = "vcc3v3_lcd0_n"; regulator-boot-on; enable-active-high; gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc_3v3_s0>; }; vcc5v0_host: vcc5v0-host { compatible = "regulator-fixed"; regulator-name = "vcc5v0_host"; regulator-boot-on; regulator-always-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_device>; pinctrl-names = "default"; pinctrl-0 = <&usb_host_pwren>; }; vcc5v0_otg: vcc5v0-otg { compatible = "regulator-fixed"; regulator-name = "vcc5v0_otg"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_device>; pinctrl-names = "default"; pinctrl-0 = <&usb_otg0_pwren>; }; }; &backlight { pwms = <&pwm1_6ch_1 0 25000 0>; power-supply = <&vcc3v3_lcd_n>; status = "okay"; }; &combphy0_ps { status = "okay"; }; &combphy1_psu { status = "okay"; }; &dp { pinctrl-0 = <&dpm0_pins>; pinctrl-names = "default"; status = "okay"; }; &dp0 { status = "okay"; }; &dp0_in_vp0 { status = "okay"; }; /* * mipidcphy0 needs to be enabled * when dsi is enabled */ &dsi { status = "disabled"; }; &dsi_panel { pinctrl-names = "default"; pinctrl-0 = <&lcd_rst_gpio>; power-supply = <&vcc3v3_lcd_n>; reset-gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_LOW>; phy-c-option; dsi,lanes = <3>; status = "disabled"; panel-init-sequence = [ 23 00 02 FF 20 23 00 02 FB 01 23 00 02 05 D9 /* VGH=17V */ 23 00 02 07 78 /* VGL=-14V */ 23 00 02 08 5A /* EN_VMODGATE2=1 */ 23 00 02 0D 63 /* VGH=16V */ 23 00 02 0E 91 /* VGL=-13V */ 23 00 02 0F 73 /* GVDD=5.2V */ 23 00 02 95 EB 23 00 02 96 EB /* Disable VDDI LV */ 23 00 02 30 11 /* ISOP */ 23 00 02 6D 66 /* EN_GMACP */ 23 00 02 75 A2 /* V128 */ 23 00 02 77 3B /* R(+) */ 29 00 11 B0 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9 29 00 11 B1 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31 29 00 11 B2 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B 29 00 0D B3 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF /* G(+) */ 29 00 11 B4 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9 29 00 11 B5 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31 29 00 11 B6 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B 29 00 0D B7 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF /* B(+) */ 29 00 11 B8 00 08 00 23 00 4D 00 6D 00 89 00 A1 00 B6 00 C9 29 00 11 B9 00 DA 01 13 01 3C 01 7E 01 AB 01 F7 02 2F 02 31 29 00 11 BA 02 67 02 A6 02 D1 03 08 03 2E 03 5B 03 6B 03 7B 29 00 0D BB 03 8E 03 A2 03 B7 03 E7 03 FD 03 FF /* CMD2_Page1 */ 23 00 02 FF 21 23 00 02 FB 01 /* R(-) */ 29 00 11 B0 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1 29 00 11 B1 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29 29 00 11 B2 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73 29 00 0D B3 03 86 03 9A 03 AF 03 DF 03 F5 03 F7 /* G(-) */ 29 00 11 B4 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1 29 00 11 B5 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29 29 00 11 B6 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73 29 00 0D B7 03 86 03 9A 03 AF 03 DF 03 F5 03 F7 /* B(-) */ 29 00 11 B8 00 00 00 1B 00 45 00 65 00 81 00 99 00 AE 00 C1 29 00 11 B9 00 D2 01 0B 01 34 01 76 01 A3 01 EF 02 27 02 29 29 00 11 BA 02 5F 02 9E 02 C9 03 00 03 26 03 53 03 63 03 73 29 00 0D BB 03 86 03 9A 03 AF 03 DF 03 F5 03 F7 29 00 02 FF 24 29 00 02 FB 01 /* VGL */ 29 00 02 00 00 29 00 02 01 00 /* VDDO */ 29 00 02 02 1C 29 00 02 03 1C /* VDDE */ 29 00 02 04 1D 29 00 02 05 1D /* STV0 */ 29 00 02 06 04 29 00 02 07 04 /* CLK8 */ 29 00 02 08 0F 29 00 02 09 0F /* CLK6 */ 29 00 02 0A 0E 29 00 02 0B 0E /* CLK4 */ 29 00 02 0C 0D 29 00 02 0D 0D /* CLK2 */ 29 00 02 0E 0C 29 00 02 0F 0C /* STV2 */ 29 00 02 10 08 29 00 02 11 08 29 00 02 12 00 29 00 02 13 00 29 00 02 14 00 29 00 02 15 00 /* VGL */ 29 00 02 16 00 29 00 02 17 00 /* VDDO */ 29 00 02 18 1C 29 00 02 19 1C /* VDDE */ 29 00 02 1A 1D 29 00 02 1B 1D /* STV0 */ 29 00 02 1C 04 29 00 02 1D 04 /* CLK7 */ 29 00 02 1E 0F 29 00 02 1F 0F /* CLK5 */ 29 00 02 20 0E 29 00 02 21 0E /* CLK3 */ 29 00 02 22 0D 29 00 02 23 0D /* CLK1 */ 29 00 02 24 0C 29 00 02 25 0C /* STV1 */ 29 00 02 26 08 29 00 02 27 08 29 00 02 28 00 29 00 02 29 00 29 00 02 2A 00 29 00 02 2B 00 /* STV0 */ 29 00 02 2D 20 29 00 02 2F 0A 29 00 02 30 44 29 00 02 33 0C 29 00 02 34 32 29 00 02 37 44 29 00 02 38 40 29 00 02 39 00 29 00 02 3A 50 29 00 02 3B 50 29 00 02 3D 42 /* STV */ 29 00 02 3F 06 29 00 02 43 06 29 00 02 47 66 29 00 02 4A 50 29 00 02 4B 50 29 00 02 4C 91 /* GCK */ 29 00 02 4D 21 29 00 02 4E 43 29 00 02 51 12 29 00 02 52 34 29 00 03 55 82 02 29 00 02 56 04 29 00 02 58 21 29 00 02 59 30 29 00 02 5A 50 29 00 02 5B 50 29 00 03 5E 00 06 29 00 02 5F 00 /* EN_LFD_SOURCE=0 */ 29 00 02 65 82 /* VDDO, VDDE */ 29 00 02 7E 20 29 00 02 7F 3C 29 00 02 82 04 29 00 02 97 C0 29 00 0D B6 05 00 05 00 00 00 00 00 05 05 00 00 /* qclk=96/5 Mhz */ 29 00 02 91 44 29 00 02 92 55 29 00 02 93 1A 29 00 02 94 5F /* SOG_HBP */ 29 00 02 D7 55 29 00 02 DA 0A 29 00 02 DE 08 /* Normal */ 29 00 02 DB 05 29 00 02 DC 55 29 00 02 DD 22 /* Line N */ 29 00 02 DF 05 29 00 02 E0 55 /* Line N+1 */ 29 00 02 E1 05 29 00 02 E2 55 /* TP0 */ 29 00 02 E3 05 29 00 02 E4 55 /* TP3 */ 29 00 02 E5 05 29 00 02 E6 55 /* Gate EQ */ 29 00 02 5C 00 29 00 02 5D 00 /* TP3 */ 29 00 02 8D 00 29 00 02 8E 00 /* No Sync @ TP */ 29 00 02 B5 90 29 00 02 FF 25 29 00 02 FB 01 /* disable auto_vbp_vfp */ 29 00 02 05 00 /* ESD_DET_ERR_SEL */ 29 00 02 19 07 /* DP_N_GCK */ 29 00 02 1F 50 29 00 02 20 50 /* DP_N_1_GCK */ 29 00 02 26 50 29 00 02 27 50 /* TP0_GCK */ 29 00 02 33 50 29 00 02 34 50 /* TP3 GCK/MUX=1 */ 29 00 02 3F E0 /* TP3_GCK_START_LINE */ 29 00 02 40 00 /* TP3_STV */ 29 00 02 44 00 29 00 02 45 40 /* TP3_GCK */ 29 00 02 48 50 29 00 02 49 50 /* LSTP0 */ 29 00 02 5B 00 29 00 02 5C 00 29 00 02 5D 00 29 00 02 5E D0 29 00 02 61 50 29 00 02 62 50 /* en_vfp_addvsync */ 29 00 02 F1 10 /* CMD2,Page10 */ 29 00 02 FF 2A 29 00 02 FB 01 /* PWRONOFF */ /* STV */ 29 00 02 64 16 /* CLR */ 29 00 02 67 16 /* GCK */ 29 00 02 6A 16 /* POL */ 29 00 02 70 30 /* ABOFF */ 29 00 02 A2 F3 29 00 02 A3 FF 29 00 02 A4 FF 29 00 02 A5 FF /* Long_V_TIMING disable */ 29 00 02 D6 08 /* CMD2,Page6 */ 29 00 02 FF 26 29 00 02 FB 01 /* TPEN */ 29 00 02 00 81 /* 90Hz */ 29 00 02 01 30 29 00 02 02 31 29 00 02 0A F2 //Table A (90Hz) 29 00 02 04 28 29 00 02 06 3C 29 00 02 0C 0B 29 00 02 0D 0C 29 00 02 0F 00 29 00 02 11 00 29 00 02 12 50 29 00 02 13 AE 29 00 02 14 A6 29 00 02 16 10 29 00 02 19 08 29 00 02 1A FF 29 00 02 1B 08 29 00 02 1C 80 29 00 02 22 00 29 00 02 23 00 29 00 02 2A 08 29 00 02 2B FF 29 00 02 1D 00 29 00 02 1E 55 29 00 02 1F 55 29 00 02 24 00 29 00 02 25 55 29 00 02 2F 05 29 00 02 30 55 29 00 02 31 05 29 00 02 32 6D 29 00 02 39 00 29 00 02 3A 55 /* Table B (60Hz,81*1+101*19=2000, Extra=20) */ 29 00 02 8B 28 29 00 02 8C 13 29 00 02 8D 0A 29 00 02 8F 0A 29 00 02 91 00 29 00 02 92 50 29 00 02 93 51 29 00 02 94 65 29 00 02 96 10 29 00 02 99 0A 29 00 02 9A 7F 29 00 02 9B 0A 29 00 02 9C 0C 29 00 02 9D 0A 29 00 02 9E 7F 29 00 02 3F 00 29 00 02 40 75 29 00 02 41 75 29 00 02 42 75 29 00 02 43 00 29 00 02 44 75 29 00 02 45 05 29 00 02 46 75 29 00 02 47 05 29 00 02 48 8D 29 00 02 49 00 29 00 02 4A 75 /* STV0 */ 29 00 02 4D 5D 29 00 02 4E 60 /* STV */ 29 00 02 4F 5D 29 00 02 50 60 /* GCK */ 29 00 02 51 70 29 00 02 52 60 /* DP_N_GCK */ 29 00 02 56 70 29 00 02 58 60 /* DP_N_1_GCK */ 29 00 02 5B 70 29 00 02 5C 60 /* TP0_GCK */ 29 00 02 60 70 29 00 02 61 60 /* TP3_GCK */ 29 00 02 64 70 29 00 02 65 60 /* LSTP0 */ 29 00 02 72 70 29 00 02 73 60 /* PRZ1 */ 29 00 02 20 01 /* PRZ3 */ /* Rescan=3 */ 29 00 02 33 11 29 00 02 34 78 29 00 02 35 16 /* DLH */ 29 00 02 C8 04 29 00 02 C9 80 29 00 02 CA 4E 29 00 02 CB 00 29 00 02 A9 4C 29 00 02 AA 47 /* CMD2,Page7 */ 29 00 02 FF 27 29 00 02 FB 01 /* VPOR_DYNH_EN=1, VPOR_CNT_REV=1 */ 29 00 02 56 06 /* FR0(60Hz) */ 29 00 02 58 80 29 00 02 59 53 29 00 02 5A 00 29 00 02 5B 14 29 00 02 5C 00 29 00 02 5D 01 29 00 02 5E 20 29 00 02 5F 10 29 00 02 60 00 29 00 02 61 1D 29 00 02 62 00 29 00 02 63 01 29 00 02 64 24 29 00 02 65 1C 29 00 02 66 00 29 00 02 67 01 29 00 02 68 25 /* FR1(90Hz) */ 29 00 02 78 80 29 00 02 79 73 29 00 02 7A 00 29 00 02 7B 14 29 00 02 7C 00 29 00 02 7D 02 29 00 02 7E 20 29 00 02 7F 21 29 00 02 80 00 29 00 02 81 2A 29 00 02 82 00 29 00 02 83 01 29 00 02 84 1C 29 00 02 85 28 29 00 02 86 00 29 00 02 87 01 29 00 02 88 1D 29 00 02 00 00 29 00 02 C3 00 /* FTE output TE, FTE1 output TSVD, LEDPWM output TSHD */ 29 00 02 D1 24 29 00 02 D2 53 /* CMD2,Page10 */ 29 00 02 FF 2A 29 00 02 FB 01 29 00 02 01 05 29 00 02 02 55 /* TP0 */ 29 00 02 03 05 29 00 02 04 75 /* TP3 */ 29 00 02 05 05 29 00 02 06 75 /* PEN_EN=1, UL_FREQ=0 */ 29 00 02 22 2F /* 90Hz */ 29 00 02 23 11 /* FR0 (60Hz) */ 29 00 02 24 00 29 00 02 25 75 29 00 02 27 00 29 00 02 28 1A 29 00 02 29 00 29 00 02 2A 1A 29 00 02 2B 00 29 00 02 2D 1A /* FR1 (90Hz) */ 29 00 02 2F 00 29 00 02 30 55 29 00 02 32 00 29 00 02 33 1A 29 00 02 34 00 29 00 02 35 1A 29 00 02 36 00 29 00 02 37 1A /* CMD2,Page3 */ 29 00 02 FF 23 29 00 02 FB 01 /* DBV=12 bit */ 29 00 02 00 80 /* PWM frequency */ 29 00 02 07 00 /* CMD3,PageA */ 29 00 02 FF E0 29 00 02 FB 01 /* VCOM Driving Ability */ 29 00 02 14 60 29 00 02 16 C0 /* CMD3,PageB */ 29 00 02 FF F0 29 00 02 FB 01 /* slave osc workaround */ 29 00 02 3A 08 /* CMD3,PageC */ 29 00 02 FF D0 29 00 02 FB 01 29 00 02 1C 88 29 00 02 1D 08 /* CMD1 */ 29 00 02 FF 10 29 00 02 FB 01 /* Only Write Slave */ 29 00 02 B9 01 /* CMD2,Page0 */ 29 00 02 FF 20 29 00 02 FB 01 29 00 02 18 40 /* CMD1 */ 29 00 02 FF 10 29 00 02 FB 01 /* Write Master & Slave */ 29 00 02 B9 02 29 00 02 35 00 29 00 03 51 00 FF 29 00 02 53 24 29 00 02 55 00 29 00 02 BB 13 /* VBP+VFP=121 */ 29 00 06 3B 03 5F 1A 04 04 /* CMD2,Page5 */ 29 00 02 FF 25 /* FRM */ 29 00 02 EC 00 /* CMD1 */ 29 00 02 FF 10 29 00 02 FB 01 05 FF 01 11 05 FF 01 29 ]; panel-exit-sequence = [ 05 00 01 28 05 00 01 10 ]; disp_timings1: display-timings { native-mode = <&dsi1_timing0>; dsi1_timing0: timing0 { clock-frequency = <241300000>; hactive = <1200>; vactive = <2000>; hfront-porch = <31>; hsync-len = <4>; hback-porch = <32>; vfront-porch = <26>; vsync-len = <2>; vback-porch = <93>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; }; &edp { force-hpd; status = "okay"; ports { port@1 { reg = <1>; edp_out_panel: endpoint { remote-endpoint = <&panel_in_edp>; }; }; }; }; &edp_in_vp1 { status = "okay"; }; &gmac1 { /* Use rgmii-rxid mode to disable rx delay inside Soc */ phy-mode = "rgmii-rxid"; clock_in_out = "output"; snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; snps,reset-active-low; /* Reset time is 20ms, 100ms for rtl8211f */ snps,reset-delays-us = <0 20000 100000>; pinctrl-names = "default"; pinctrl-0 = <ð1m1_miim ð1m1_tx_bus2 ð1m1_rx_bus2 ð1m1_rgmii_clk ð1m1_rgmii_bus ðm1_clk1_25m_out>; tx_delay = <0x20>; /* rx_delay = <0x3f>; */ phy-handle = <&rgmii_phy1>; status = "okay"; }; &hdptxphy { status = "okay"; }; &i2c0 { status = "okay"; gsl3673@40 { compatible = "GSL,GSL3673"; reg = <0x40>; screen_max_x = <1536>; screen_max_y = <2048>; pinctrl-names = "default"; pinctrl-0 = <&touch_gpio>; irq_gpio_number = <&gpio0 RK_PC5 IRQ_TYPE_LEVEL_LOW>; rst_gpio_number = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; }; }; &mdio1 { rgmii_phy1: phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x1>; clocks = <&cru REFCLKO25M_GMAC1_OUT>; }; }; &mipidcphy0 { status = "disabled"; }; &pcie0 { reset-gpios = <&gpio4 RK_PC7 GPIO_ACTIVE_HIGH>; status = "okay"; }; &pinctrl { lcd { lcd_rst_gpio: lcd-rst-gpio { rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; }; }; touch { touch_gpio: touch-gpio { rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>, <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; usb { usb_host_pwren: usb-host-pwren { rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; }; usb_otg0_pwren: usb-otg0-pwren { rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; &pwm1_6ch_1 { pinctrl-0 = <&pwm1m0_ch1>; status = "okay"; }; &route_edp { status = "okay"; }; &sdio { max-frequency = <200000000>; no-sd; no-mmc; bus-width = <4>; disable-wp; cap-sd-highspeed; cap-sdio-irq; keep-power-in-suspend; mmc-pwrseq = <&sdio_pwrseq>; non-removable; pinctrl-names = "default"; pinctrl-0 = <&sdmmc1m1_bus4 &sdmmc1m1_clk &sdmmc1m1_cmd>; sd-uhs-sdr104; status = "okay"; }; &u2phy0_otg { vbus-supply = <&vcc5v0_otg>; rockchip,sel-pipe-phystatus; status = "okay"; }; &u2phy1_otg { phy-supply = <&vcc5v0_host>; status = "okay"; }; &uart4 { status = "disabled"; }; &usbdp_phy { maximum-speed = "high-speed"; rockchip,dp-lane-mux = <0 1 2 3>; status = "okay"; }; &usbdp_phy_dp { status = "okay"; }; &usbdp_phy_u3 { status = "okay"; }; &usb_drd0_dwc3 { phys = <&u2phy0_otg>; phy-names = "usb2-phy"; extcon = <&u2phy0>; maximum-speed = "high-speed"; snps,dis_u2_susphy_quirk; snps,usb2-lpm-disable; status = "okay"; }; &usb_drd1_dwc3 { dr_mode = "host"; status = "okay"; }; &wireless_bluetooth { status = "disabled"; }; &wireless_wlan { WIFI,poweren_gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; };