// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
 */
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>

/ {
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/*
		 * 256 MB DDR offset CMA start
		 * 256 + 8 MB DDR offset waveform start
		 */
		waveform_reserved: waveform@50800000 {
			reg = <0x0 0x50800000 0x0 0x100000>;
		};

		display_reserved: framebuffer@50900000 {
			reg = <0x0 0x50900000 0x0 0x3800000>;
		};
	};

	ebc_dev: ebc-dev {
		compatible = "rockchip,ebc-dev";
		ebc_tcon = <&ebc>;
		memory-region = <&display_reserved>;
		waveform-region = <&waveform_reserved>;
		nvmem-cells = <&cpu_code>;
		nvmem-cell-names = "cpu-code";
		status = "okay";
	};
};

&csu {
	status = "okay";
};

&display_subsystem {
	status = "disabled";
};

&dmc {
	wait-mode = <DMC_WAIT_MODE_EBC_VBANK>;
	upthreshold = <50>;
	downdifferential = <25>;
};

&ebc {
	status = "okay";
};

&i2c1 {
	status = "okay";

	rk806: pmic@23 {
		compatible = "rockchip,rk806";
		reg = <0x23>;

		interrupt-parent = <&gpio0>;
		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;

		pinctrl-names = "default", "pmic-power-off";
		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
		pinctrl-1 = <&rk806_dvs2_pwrdn>;

		//for rk3576 have ultra sleep circuit design
		pwrctrl3_output = <0>;

		/* 2800mv-3500mv */
		low_voltage_threshold = <3000>;
		/* 2700mv-3400mv */
		shutdown_voltage_threshold = <2700>;
		/* 140 160 */
		shutdown_temperture_threshold = <160>;
		hotdie_temperture_threshold = <115>;

		/* 0: restart PMU;
		 * 1: reset all the power off reset registers,
		 *    forcing the state to switch to ACTIVE mode;
		 * 2: Reset all the power off reset registers,
		 *    forcing the state to switch to ACTIVE mode,
		 *    and simultaneously pull down the RESETB PIN for 5mS before releasing
		 */
		pmic-reset-func = <1>;
		/* buck5 external feedback resister disable */
		buck5-feedback-disable;
		vdc-wakeup-enable;

		/* set power key on time */
		pwron-on-time-500ms;

		vcc1-supply = <&vcc_sys>;
		vcc2-supply = <&vcc_sys>;
		vcc3-supply = <&vcc_sys>;
		vcc4-supply = <&vcc_sys>;
		vcc5-supply = <&vcc_sys>;
		vcc6-supply = <&vcc_sys>;
		vcc7-supply = <&vcc_sys>;
		vcc8-supply = <&vcc_sys>;
		vcc9-supply = <&vcc_sys>;
		vcc10-supply = <&vcc_sys>;
		vcc11-supply = <&vcc_2v0_pldo_s3>;
		vcc12-supply = <&vcc_sys>;
		vcc13-supply = <&vcc_1v1_nldo_s3>;
		vcc14-supply = <&vcc_1v1_nldo_s3>;
		vcca-supply = <&vcc_sys>;

		pwrkey {
			status = "okay";
		};

		pinctrl_rk806: pinctrl_rk806 {
			gpio-controller;
			#gpio-cells = <2>;

			rk806_dvs1_null: rk806_dvs1_null {
				pins = "gpio_pwrctrl2";
				function = "pin_fun0";
			};

			rk806_dvs1_slp: rk806_dvs1_slp {
				pins = "gpio_pwrctrl1";
				function = "pin_fun1";
			};

			rk806_dvs1_pwrdn: rk806_dvs1_pwrdn {
				pins = "gpio_pwrctrl1";
				function = "pin_fun2";
			};

			rk806_dvs1_rst: rk806_dvs1_rst {
				pins = "gpio_pwrctrl1";
				function = "pin_fun3";
			};

			rk806_dvs2_null: rk806_dvs2_null {
				pins = "gpio_pwrctrl2";
				function = "pin_fun0";
			};

			rk806_dvs2_slp: rk806_dvs2_slp {
				pins = "gpio_pwrctrl2";
				function = "pin_fun1";
			};

			rk806_dvs2_pwrdn: rk806_dvs2_pwrdn {
				pins = "gpio_pwrctrl2";
				function = "pin_fun2";
			};

			rk806_dvs2_rst: rk806_dvs2_rst {
				pins = "gpio_pwrctrl2";
				function = "pin_fun3";
			};

			rk806_dvs2_dvs: rk806_dvs2_dvs {
				pins = "gpio_pwrctrl2";
				function = "pin_fun4";
			};

			rk806_dvs2_gpio: rk806_dvs2_gpio {
				pins = "gpio_pwrctrl2";
				function = "pin_fun5";
			};

			rk806_dvs3_null: rk806_dvs3_null {
				pins = "gpio_pwrctrl3";
				function = "pin_fun0";
			};

			rk806_dvs3_slp: rk806_dvs3_slp {
				pins = "gpio_pwrctrl3";
				function = "pin_fun1";
			};

			rk806_dvs3_pwrdn: rk806_dvs3_pwrdn {
				pins = "gpio_pwrctrl3";
				function = "pin_fun2";
			};

			rk806_dvs3_rst: rk806_dvs3_rst {
				pins = "gpio_pwrctrl3";
				function = "pin_fun3";
			};

			rk806_dvs3_dvs: rk806_dvs3_dvs {
				pins = "gpio_pwrctrl3";
				function = "pin_fun4";
			};

			rk806_dvs3_gpio: rk806_dvs3_gpio {
				pins = "gpio_pwrctrl3";
				function = "pin_fun5";
			};
		};

		regulators {
			vdd_cpu_big_s0: DCDC_REG1 {
				regulator-always-on;
				regulator-boot-on;
				regulator-init-microvolt = <850000>;
				regulator-min-microvolt = <550000>;
				regulator-max-microvolt = <950000>;
				regulator-ramp-delay = <12500>;
				regulator-name = "vdd_cpu_big_s0";
				regulator-enable-ramp-delay = <400>;
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdd_npu_s0: DCDC_REG2 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <550000>;
				regulator-max-microvolt = <950000>;
				regulator-ramp-delay = <12500>;
				regulator-name = "vdd_npu_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdd_cpu_lit_s0: DCDC_REG3 {
				regulator-always-on;
				regulator-boot-on;
				regulator-init-microvolt = <850000>;
				regulator-min-microvolt = <550000>;
				regulator-max-microvolt = <950000>;
				regulator-ramp-delay = <12500>;
				regulator-name = "vdd_cpu_lit_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
					regulator-suspend-microvolt = <750000>;
				};
			};

			vcc_3v3_s3: DCDC_REG4 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcc_3v3_s3";
				regulator-state-mem {
					regulator-on-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdd_gpu_s0: DCDC_REG5 {
				regulator-boot-on;
				regulator-init-microvolt = <750000>;
				regulator-min-microvolt = <550000>;
				regulator-max-microvolt = <900000>;
				regulator-ramp-delay = <12500>;
				regulator-name = "vdd_gpu_s0";
				regulator-enable-ramp-delay = <400>;
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
					regulator-suspend-microvolt = <850000>;
				};
			};

			vddq_ddr_s0: DCDC_REG6 {
				regulator-always-on;
				regulator-boot-on;
				regulator-name = "vddq_ddr_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdd_logic_s0: vdd_log_mem_s0: DCDC_REG7 {
				regulator-always-on;
				regulator-boot-on;
				regulator-init-microvolt = <750000>;
				regulator-min-microvolt = <550000>;
				regulator-max-microvolt = <800000>;
				regulator-name = "vdd_logic_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vcc_1v8_s3: DCDC_REG8 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc_1v8_s3";
				regulator-state-mem {
					regulator-on-in-suspend;
					regulator-changeable-in-suspend;
					regulator-suspend-microvolt = <1800000>;
				};
			};

			vdd2_ddr_s3: DCDC_REG9 {
				regulator-always-on;
				regulator-boot-on;
				regulator-name = "vdd2_ddr_s3";
				regulator-state-mem {
					regulator-on-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdd_ddr_s0: DCDC_REG10 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <550000>;
				regulator-max-microvolt = <1200000>;
				regulator-name = "vdd_ddr_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vcca_1v8_s0: PLDO_REG1 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcca_1v8_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vcc_1v8_cam: PLDO_REG2 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcc_1v8_cam";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdda_1v2_s0: PLDO_REG3 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-name = "vdda_1v2_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vcca3v3_codec: PLDO_REG4 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vcca3v3_codec";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vccio_sd_s0: PLDO_REG5 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-name = "vccio_sd_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vcca1v8_pldo6_s3: PLDO_REG6 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-name = "vcca1v8_pldo6_s3";
				regulator-state-mem {
					regulator-on-in-suspend;
					regulator-changeable-in-suspend;
					regulator-suspend-microvolt = <1800000>;
				};
			};

			vdd_0v75_s3: NLDO_REG1 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <750000>;
				regulator-max-microvolt = <750000>;
				regulator-name = "vdd_0v75_s3";
				regulator-state-mem {
					regulator-on-in-suspend;
					regulator-changeable-in-suspend;
					regulator-suspend-microvolt = <750000>;
				};
			};

			vdda_ddr_pll_s0: NLDO_REG2 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <850000>;
				regulator-name = "vdda_ddr_pll_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdda0v75_hdmi_s0: NLDO_REG3 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <750000>;
				regulator-max-microvolt = <750000>;
				regulator-name = "vdda0v75_hdmi_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdda_0v85_s0: NLDO_REG4 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <850000>;
				regulator-name = "vdda_0v85_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};

			vdda_0v75_s0: NLDO_REG5 {
				regulator-always-on;
				regulator-boot-on;
				regulator-min-microvolt = <750000>;
				regulator-max-microvolt = <750000>;
				regulator-name = "vdda_0v75_s0";
				regulator-state-mem {
					regulator-off-in-suspend;
					regulator-changeable-in-suspend;
				};
			};
		};
	};
};

&rockchip_suspend {
	rockchip,sleep-pin-config = <
		(0
		| RKPM_SLEEP_PIN1_EN
		)
		(0)
	>;

	rockchip,sleep-io-ret-config = <
		(0
		 | RKPM_VCCIO3_RET_EN
		)
	>;

	rockchip,sleep-debug-en = <1>;

	rockchip,regulator-off-in-mem-lite =
		<&vdd_cpu_big_s0>, <&vdd_npu_s0>, <&vdd_cpu_lit_s0>, <&vdd_gpu_s0>, <&vddq_ddr_s0>, <&vdd_logic_s0>,
		<&vdd_ddr_s0>, <&vcca_1v8_s0>, <&vcc_1v8_cam>, <&vdda_1v2_s0>, <&vcca3v3_codec>, <&vccio_sd_s0>,
		<&vdda_ddr_pll_s0>, <&vdda0v75_hdmi_s0>, <&vdda_0v85_s0>, <&vdda_0v75_s0>;

	rockchip,regulator-on-in-mem-lite =
		<&vcc_3v3_s3>, <&vcc_1v8_s3>, <&vdd2_ddr_s3>, <&vcca1v8_pldo6_s3>, <&vdd_0v75_s3>;

	rockchip,regulator-off-in-mem =
		<&vdd_cpu_big_s0>, <&vdd_npu_s0>, <&vdd_cpu_lit_s0>, <&vdd_gpu_s0>, <&vddq_ddr_s0>, <&vdd_logic_s0>,
		<&vdd_ddr_s0>, <&vcca_1v8_s0>, <&vcc_1v8_cam>, <&vdda_1v2_s0>, <&vcca3v3_codec>, <&vccio_sd_s0>,
		<&vdda_ddr_pll_s0>, <&vdda0v75_hdmi_s0>, <&vdda_0v85_s0>, <&vdda_0v75_s0>;

	rockchip,regulator-on-in-mem =
		<&vcc_3v3_s3>, <&vcc_1v8_s3>, <&vdd2_ddr_s3>, <&vcca1v8_pldo6_s3>, <&vdd_0v75_s3>;

	rockchip,regulator-off-in-mem-ultra =
		<&vdd_cpu_big_s0>, <&vdd_npu_s0>, <&vdd_cpu_lit_s0>, <&vdd_gpu_s0>, <&vddq_ddr_s0>, <&vdd_logic_s0>,
		<&vdd_ddr_s0>, <&vcca_1v8_s0>, <&vcc_1v8_cam>, <&vdda_1v2_s0>, <&vcca3v3_codec>, <&vccio_sd_s0>,
		<&vdda_ddr_pll_s0>, <&vdda0v75_hdmi_s0>, <&vdda_0v85_s0>, <&vdda_0v75_s0>, <&vcc_3v3_s3>, <&vcc_1v8_s3>,
		<&vdd_0v75_s3>;

	rockchip,regulator-on-in-mem-ultra = <&vdd2_ddr_s3>, <&vcca1v8_pldo6_s3>;

	status = "okay";
};