// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
 * Copyright (c) 2021 Radxa Limited.
 *
 */

/dts-v1/;

#include "rk3568-radxa-rock-3-compute-module-plus.dtsi"

/ {
	model = "Radxa E25";
	compatible = "radxa,e25", "rockchip,rk3568";

	vcc5v0_otg: vcc5v0-otg-regulator {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc5v0_otg_en>;
		regulator-name = "vcc5v0_otg";
	};

	pcie30_3v3: pcie30-3v3 {
		compatible = "regulator-gpio";
		regulator-name = "pcie30_3v3";
		regulator-min-microvolt = <100000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
		gpios-states = <0x1>;
		states = <100000 0x0
			  3300000 0x1>;
	};

	vcc3v3_minipcie: vcc3v3-minipcie {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc3v3_minipcie_en>;
		regulator-name = "vcc3v3_minipcie";
		regulator-always-on;
		regulator-boot-on;
	};

	//low:wifi,high:5G
	vcc3v3_minipcie_to_5g_or_wifi: vcc3v3-minipcie-to-5g-or-wifi {
		compatible = "regulator-fixed";
		enable-active-low;
		gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc3v3_minipcie_to_5g_or_wifi_en>;
		regulator-name = "vcc3v3_minipcie_to_5g_or_wifi";
		regulator-always-on;
		regulator-boot-on;
	};

	vcc3v3_pcie_30x1: vcc3v3-pci-30x1 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc3v3_pcie_30x1_en>;
		regulator-name = "vcc3v3_pci_30x1";
		regulator-always-on;
		regulator-boot-on;
	};

	em05_modem: em05-modem {
		compatible = "lte-em05-modem-platdata";
		pinctrl-names = "default";
		pinctrl-0 = <&em05_power_en &em05_airplane_mode &em05_reset>;
		em05,power-gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
		em05,reset-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
		em05,airplane-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	rgb0: rgb0 {
		compatible = "pwm-leds";
		status = "okay";

		rgb0-red {
			pwms = <&pwm1 0 1000000 0>;
			max-brightness = <255>;
		};

		rgb0-blue {
			pwms = <&pwm12 0 1000000 0>;
			max-brightness = <255>;
		};

		rgb0-green {
			pwms = <&pwm2 0 1000000 0>;
			max-brightness = <255>;
		};
	};
};

&fiq_debugger {
	rockchip,baudrate = <115200>;
};

&sdio_pwrseq {
	status = "disabled";
};

&wireless_wlan {
	status = "disabled";
};

&wireless_bluetooth {
	status = "disabled";
};

&sdmmc2 {
	status = "disabled";
};

//sdcard
&sdmmc0 {
	bus-width = <4>;
	cap-mmc-highspeed;
	cap-sd-highspeed;
	disable-wp;
	sd-uhs-sdr50;
	vmmc-supply = <&vcc3v3_sd>;
	vqmmc-supply = <&vccio_sd>;
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
	cd-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&u2phy0_host {
	phy-supply = <&vcc5v0_otg>;
	status = "okay";
};

&u2phy0_otg {
	vbus-supply = <&vcc5v0_otg>;
	status = "okay";
};

&u2phy1_host {
	phy-supply = <&vcc5v0_otg>;
	status = "okay";
};

&u2phy1_otg {
	phy-supply = <&vcc5v0_otg>;
	status = "okay";
};

/* USB OTG/USB Host_1 USB 2.0 Comb PHY_0 */
&usb2phy0 {
	status = "okay";
	u2phy0_host {
        status = "okay";
	};
	u2phy0_otg {
		 status = "okay";
	};
};

/* USB Host_2/USB Host_3 USB 2.0 Comb PHY_1 */
&usb2phy1 {
	status = "okay";
	u2phy1_host {
        status = "okay";
	};
	u2phy1_otg {
         status = "okay";
	};
};

/* USB 2.0 Host_2 EHCI controller for high speed */
&usb_host0_ehci {
	status = "okay";
};

/* USB 2.0 Host_2 OHCI controller for full/low speed */
&usb_host0_ohci {
	status = "okay";
};

/* USB 2.0 Host_3 EHCI controller for high speed */
&usb_host1_ehci {
	status = "okay";
};

/* USB 2.0 Host_3 OHCI controller for full/low speed */
&usb_host1_ohci {
	status = "okay";
};

&usbdrd_dwc3 {
	extcon=<&usb2phy0>;
	status="okay";
};

/* USB 3.0 OTG controller */
&usbdrd30 {
	status = "okay";
};

&usbhost_dwc3 {
	phys = <&u2phy0_host>;
	phy-names = "usb2-phy";
	maximum-speed = "high-speed"; /* set dwc3 controller to high speed */
	status = "okay";
};

/* USB 3.0 Host_1 controller */
&usbhost30 {
	status = "disabled";
};

/* USB 3.0 OTG/SATA Combo PHY_0 */
&combphy0_us {
	status = "okay";
};

/* USB 3.0 Host/SATA/QSGMII Combo PHY_1 */
&combphy1_usq {
	rockchip,dis-u3otg1-port; /* set dwc3 controller to high speed */
	status = "okay";
};

&sata1 {
	status = "okay";
};

&pcie30phy {
	status = "okay";
};

&pcie3x1 {
	rockchip,bifurcation;
	reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&pcie30_3v3>;
	pinctrl-0 = <&pcie30x1m0_pins>; 
	status = "okay";
};

&pcie3x2 {
	rockchip,bifurcation;
	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&pcie30_3v3>;
	pinctrl-0 = <&pcie30x2m1_pins>; 
	status = "okay";
};

&combphy2_psq {
	status = "okay";
};

&pcie2x1 {
	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&pcie30_3v3>;
	pinctrl-0 = <&pcie20m2_pins>; 
	status = "okay";
};

&pwm1 {
	status = "okay";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm1m0_pins>;
};

&pwm2 {
	status = "okay";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm2m0_pins>;
};

&pwm12 {
	status = "okay";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm12m1_pins>;
};

&user_leds {
	linux,default-trigger = "none";
	default-state = "off";
};

&pinctrl {
	usb {
		vcc5v0_otg_en: vcc5v0-otg-en {
			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	pci-en {
		vcc3v3_minipcie_en: vcc3v3-minipcie-en {
			rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		vcc3v3_pcie_30x1_en: vcc3v3-pcie-30x1-en {
			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		vcc3v3_minipcie_to_5g_or_wifi_en: vcc3v3-minipcie-to-5g-or-wifi-en {
			rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	lte-em05-modem {
		em05_airplane_mode: em05-airplane-mode {
			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		em05_power_en: em05-power-en {
			rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		em05_reset: em05-reset {
			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};