// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2022 Rockchip Electronics Co., Ltd. * */ / { model = "Rockchip RK3399 Evaluation Board (Chrome OS)"; compatible = "google,rk3399evb", "rockchip,rk3399-evb", "rockchip,rk3399"; edp_panel: edp-panel { compatible = "lg,lp097qx1-spa1", "panel-simple"; backlight = <&backlight>; power-supply = <&vcc3v3_s0>; enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; ports { panel_in_edp: endpoint { remote-endpoint = <&edp_out_panel>; }; }; }; hdmi_codec: hdmi-codec { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; simple-audio-card,mclk-fs = <256>; simple-audio-card,name = "HDMI-CODEC"; simple-audio-card,cpu { sound-dai = <&i2s2>; }; simple-audio-card,codec { sound-dai = <&hdmi>; }; }; sound { compatible = "rockchip,cdndp-sound"; rockchip,cpu = <&i2s2>; rockchip,codec = <&cdn_dp>; }; }; &cdn_dp { status = "okay"; extcon = <&fusb0>, <&fusb1>; ports { /* Don't use vopl for dp, save it for edp */ dp_in: port { /delete-node/ endpoint@1; }; }; }; &dsi { status = "okay"; panel@0 { compatible ="boe,tv080wum-nl0"; reg = <0>; backlight = <&backlight>; enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi: endpoint { remote-endpoint = <&dsi_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi_out_panel: endpoint { remote-endpoint = <&panel_in_dsi>; }; }; }; }; &edp { status = "disabled"; ports { edp_out: port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; edp_out_panel: endpoint@0 { reg = <0>; remote-endpoint = <&panel_in_edp>; }; }; }; }; &hdmi { #address-cells = <1>; #size-cells = <0>; #sound-dai-cells = <0>; status = "disabled"; }; &i2s2 { #sound-dai-cells = <0>; status = "okay"; }; &vopb { status = "okay"; }; &vopb_mmu { status = "okay"; }; &vopl { status = "okay"; /* Don't use vopl for dp, save it for edp */ vopl_out: port { /delete-node/ endpoint@3; }; }; &vopl_mmu { status = "okay"; }; &display_subsystem { status = "okay"; };