/dts-v1/;
/plugin/;

#include <dt-bindings/clock/rk3588-cru.h>
#include <dt-bindings/power/rk3588-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>

/ {
	fragment@0 {
		target = <&i2c3>;

		__overlay__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			ov13850: ov13850@10{
                status = "okay";
                compatible = "ovti,ov13850";
                reg = <0x10>;
                clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
                clock-names = "xvclk";
                pinctrl-names = "default";
                pinctrl-0 = <&mipim0_camera3_clk>;
                power-domains = <&power RK3588_PD_VI>;
                rockchip,grf = <&sys_grf>;
                pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
                reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
                rockchip,camera-module-index = <0>;
                rockchip,camera-module-facing = "back";
                rockchip,camera-module-name = "ZC-OV13850R2A-V1";
                rockchip,camera-module-lens-name = "Largan-50064B31";
                port {
                    ov13850_out0: endpoint {
                        remote-endpoint = <&mipidphy0_in_ucam0>;
                        data-lanes = <1 2 3 4>;
                    };
                };
            };
		};
	};

	fragment@1 {
		target = <&csi2_dphy0_hw>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@2 {
		target = <&csi2_dphy0>;

		__overlay__ {
			status = "okay";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
                    reg = <0>;
                    #address-cells = <1>;
                    #size-cells = <0>;

                    mipidphy0_in_ucam0: endpoint@1 {
                        reg = <1>;
                        remote-endpoint = <&ov13850_out0>;
                        data-lanes = <1 2 3 4>;
                    };

                };

				port@1 {
                    reg = <1>;
                    #address-cells = <1>;
                    #size-cells = <0>;

                    csidphy0_out: endpoint@0 {
                        reg = <0>;
                        remote-endpoint = <&mipi2_csi2_input>;
                    };
                };
			};
		};
	};

	fragment@3 {
		target = <&mipi2_csi2>;

		__overlay__ {
			status = "okay";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					#address-cells = <1>;
					#size-cells = <0>;

					mipi2_csi2_input: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&csidphy0_out>;
					};
				};

				port@1 {
					reg = <1>;
					#address-cells = <1>;
					#size-cells = <0>;

					mipi2_csi2_output: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&cif_mipi2_in0>;
					};
				};
			};
		};
	};

	fragment@4 {
		target = <&rkcif>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@5 {
		target = <&rkcif_mipi_lvds2>;

		__overlay__ {
			status = "okay";

			port {
				cif_mipi2_in0: endpoint {
					remote-endpoint = <&mipi2_csi2_output>;
				};
			};
		};
	};

	fragment@6 {
		target = <&rkcif_mipi_lvds2_sditf>;

		__overlay__ {
			status = "okay";

			port {
				mipi_lvds2_sditf: endpoint {
					remote-endpoint = <&isp0_vir2>;
				};
			};
		};
	};


	fragment@7 {
		target = <&rkcif_mmu>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@8 {
		target = <&isp0_mmu>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@9 {
		target = <&rkisp0>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@10 {
		target = <&rkisp0_vir2>;

		__overlay__ {
			status = "okay";

			port {
				#address-cells = <1>;
				#size-cells = <0>;

				isp0_vir2: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&mipi_lvds2_sditf>;
				};
			};
		};
	};
	
};