// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
 */

/dts-v1/;

#include "rv1103.dtsi"
#include "rv1103-evb-v10.dtsi"
#include "rv1106-thunder-boot-spi-nor.dtsi"

/ {
	model = "Rockchip RV1103G EVB2 IPC V10 Board";
	compatible = "rockchip,rv1103g-evb2-v10", "rockchip,rv1103";

	chosen {
		bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip storagemedia=mtd androidboot.storagemedia=mtd androidboot.mode=normal";
	};

	vcc_1v8: vcc-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_1v8";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	vcc_3v3: vcc-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_3v3";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	vcc3v3_sd: vcc3v3-sd {
		compatible = "regulator-fixed";
		gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
		regulator-name = "vcc3v3_sd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-low;
		regulator-always-on;
		regulator-boot-on;
		pinctrl-names = "default";
		pinctrl-0 = <&sdmmc_pwren>;
	};

	vcc3v3_wifi: vcc3v3-wifi {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3_wifi";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-low;
		regulator-always-on;
		regulator-boot-on;
		gpio = <&gpio1 RK_PC7 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&wifi_pwren>;
	};

	vdd_arm: vdd-arm {
		compatible = "pwm-regulator";
		pwms = <&pwm0 0 5000 1>;
		regulator-name = "vdd_arm";
		regulator-min-microvolt = <800000>;
		regulator-max-microvolt = <1000000>;
		regulator-init-microvolt = <900000>;
		regulator-always-on;
		regulator-boot-on;
		regulator-settling-time-up-us = <250>;
	};

};

&acodec {
	#sound-dai-cells = <0>;
	pa-ctl-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&csi2_dphy_hw {
	status = "okay";
};

&csi2_dphy0 {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			csi_dphy_input0: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&sc3338_out>;
				data-lanes = <1 2>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			csi_dphy_output: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&mipi_csi2_input>;
			};
		};
	};
};

&fiq_debugger {
	rockchip,baudrate = <1500000>;
	pinctrl-names = "default";
	pinctrl-0 = <&uart2m1_xfer>;
};

&i2c4 {
	rockchip,amp-shared;
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4m2_xfer>;
	status = "okay";

	sc3338: sc3338@30 {
		compatible = "smartsens,sc3338";
		status = "okay";
		reg = <0x30>;
		clocks = <&cru MCLK_REF_MIPI0>;
		clock-names = "xvclk";
		pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&mipi_refclk_out0>;
		rockchip,camera-module-index = <0>;
		rockchip,camera-module-facing = "back";
		rockchip,camera-module-name = "FKO1";
		rockchip,camera-module-lens-name = "30IRC-F16";
		port {
			sc3338_out: endpoint {
				remote-endpoint = <&csi_dphy_input0>;
				data-lanes = <1 2>;
			};
		};
	};
};

&mailbox {
	status = "okay";
};

&memory {
	reg = <0x00000000 0x04000000>;
};

&mipi0_csi2 {
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi_csi2_input: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&csi_dphy_output>;
			};
		};

		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			mipi_csi2_output: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&cif_mipi_in>;
			};
		};
	};
};

&pinctrl {
	sdmmc {
		/omit-if-no-ref/
		sdmmc_pwren: sdmmc-pwren {
			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	wifi {
		wifi_pwren: wifi-pwren {
			rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

&pwm10 {
	status = "okay";
};

&pwm11 {
	status = "okay";
	pinctrl-0 = <&pwm11m1_pins>;
};

&rkcif {
	status = "okay";
};

&rkcif_mipi_lvds {
	status = "okay";

	memory-region-thunderboot = <&rkisp_thunderboot>;
	pinctrl-names = "default";
	pinctrl-0 = <&mipi_pins>;
	port {
		/* MIPI CSI-2 endpoint */
		cif_mipi_in: endpoint {
			remote-endpoint = <&mipi_csi2_output>;
		};
	};
};

&rkcif_mipi_lvds_sditf {
	status = "okay";

	port {
		/* MIPI CSI-2 endpoint */
		mipi_lvds_sditf: endpoint {
			remote-endpoint = <&isp_in>;
		};
	};
};

&rkisp {
	status = "okay";
};

&rkisp_vir0 {
	status = "okay";
	memory-region-thunderboot = <&rkisp_thunderboot>;

	port@0 {
		isp_in: endpoint {
			remote-endpoint = <&mipi_lvds_sditf>;
		};
	};
};

&rkisp_thunderboot {
	/* reg's offset MUST match with RTOS */
	/*
	 * vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
	 * e.g. 2304x1296: 0xf30000
	 */
	reg = <0x00860000 0xf30000>;
};

&ramdisk_r {
	reg = <0x1790000 (10 * 0x00100000)>;
};

&ramdisk_c {
	reg = <0x2190000 (5 * 0x00100000)>;
};

&saradc {
	status = "okay";
	vref-supply = <&vcc_1v8>;
};

&sfc {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <125000000>;
		spi-rx-bus-width = <4>;
		spi-tx-bus-width = <1>;
	};
};

&thunder_boot_service {
	status = "okay";
};

&usbdrd_dwc3 {
	dr_mode = "host";
};