/* * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include "rk322x.dtsi" #include "rk3229-cpu-opp.dtsi" / { chosen { bootargs = "earlycon=uart8250,mmio32,0x11030000"; }; fiq-debugger { compatible = "rockchip,fiq-debugger"; interrupts = ; rockchip,serial-id = <2>; rockchip,signal-irq = <159>; rockchip,wake-irq = <0>; rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ pinctrl-names = "default"; pinctrl-0 = <&uart21_xfer>; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; xin32k: xin32k { compatible = "fixed-clock"; clock-frequency = <32768>; clock-output-names = "xin32k"; #clock-cells = <0>; }; }; &cpu0 { enable-method = "psci"; }; &cpu1 { enable-method = "psci"; }; &cpu2 { enable-method = "psci"; }; &cpu3 { enable-method = "psci"; }; &emmc { max-frequency = <125000000>; broken-cd; bus-width = <8>; cap-mmc-highspeed; no-sdio; no-sd; disable-wp; non-removable; num-slots = <1>; /delete-property/ default-sample-phase; /delete-property/ pinctrl-names; /delete-property/ pinctrl-0; status = "okay"; }; &cpu0 { cpu-supply = <&vdd_arm>; }; &gpu { mali-supply = <&vdd_logic>; }; &i2c0 { status = "okay"; rk805: rk805@18 { compatible = "rockchip,rk805"; status = "okay"; reg = <0x18>; interrupt-parent = <&gpio1>; interrupts = <1 IRQ_TYPE_LEVEL_LOW>; spinctrl-names = "default"; pinctrl-0 = <&pmic_int_l>; rockchip,system-power-controller; wakeup-source; gpio-controller; #gpio-cells = <2>; #clock-cells = <1>; clock-output-names = "rk805-clkout1", "rk805-clkout2"; rtc { status = "okay"; }; pwrkey { status = "okay"; }; gpio { status = "okay"; }; regulators { vdd_arm: DCDC_REG1 { regulator-name = "vdd_arm"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1450000>; regulator-initial-mode = <0x1>; regulator-ramp-delay = <12500>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; regulator-suspend-microvolt = <950000>; }; }; vdd_logic: DCDC_REG2 { regulator-name = "vdd_logic"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1450000>; regulator-initial-mode = <0x1>; regulator-ramp-delay = <12500>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; regulator-suspend-microvolt = <1000000>; }; }; vcc_ddr: DCDC_REG3 { regulator-name = "vcc_ddr"; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; }; }; vcc_io: DCDC_REG4 { regulator-name = "vcc_io"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-initial-mode = <0x1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-mode = <0x2>; regulator-on-in-suspend; regulator-suspend-microvolt = <3300000>; }; }; vcc_18: LDO_REG1 { regulator-name = "vcc_18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; }; }; vcc_18emmc: LDO_REG2 { regulator-name = "vcc_18emmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1800000>; }; }; vdd_10: LDO_REG3 { regulator-name = "vdd_10"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-on-in-suspend; regulator-suspend-microvolt = <1000000>; }; }; }; }; }; &io_domains { status = "okay"; vccio1-supply = <&vcc_io>; vccio2-supply = <&vcc_18>; vccio4-supply = <&vcc_io>; }; &pinctrl { pmic { pmic_int_l: pmic-int-l { rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_a1 */ }; }; }; &tsadc { rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ status = "okay"; };