# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/rockchip-sfc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip Serial Flash Controller (SFC)

maintainers:
  - Heiko Stuebner <heiko@sntech.de>
  - Chris Morgan <macromorgan@hotmail.com>

allOf:
  - $ref: spi-controller.yaml#

properties:
  compatible:
    enum:
      - rockchip,fspi
      - rockchip,rk3506-fspi
      - rockchip,sfc

    description:
      The rockchip sfc controller is a standalone IP with version register,
      and the driver can handle all the feature difference inside the IP
      depending on the version register.
      The rockchip flexible spi controller is the next generation IP of sfc.

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Bus Clock
      - description: Module Clock

  clock-names:
    items:
      - const: clk_sfc
      - const: hclk_sfc

  power-domains:
    maxItems: 1

  rockchip,sfc-no-dma:
    description: Disable DMA and utilize FIFO mode only
    type: boolean

  rockchip,sclk-x2-bypass:
    description:
      Turn off the internal 2 frequency division logic of the controller clock,
      and the interface clock is 1:1 with the controller working clock.
    type: boolean

  rockchip,max-dll:
    description:
      Setting maximum dll cell.

patternProperties:
  "^flash@[0-3]$":
    type: object
    properties:
      reg:
        minimum: 0
        maximum: 3

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

Optional properties:
  - sfc-cs-gpios: specifies the gpio pins to be used for chipselects.
    The gpios will be referred to as reg = <index> in the SPI child nodes.
    If unspecified, a single SPI device without a chip select can be used.
  - reset-gpios: specifies the reset gpio pin to be used for reseting the devices.

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/px30-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/px30-power.h>

    sfc: spi@ff3a0000 {
        compatible = "rockchip,sfc";
        reg = <0xff3a0000 0x4000>;
        interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
        clock-names = "clk_sfc", "hclk_sfc";
        pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
        pinctrl-names = "default";
        power-domains = <&power PX30_PD_MMC_NAND>;
        sfc-cs-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>, <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>;
        reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
        #address-cells = <1>;
        #size-cells = <0>;

        flash@0 {
            compatible = "jedec,spi-nor";
            reg = <0>;
            spi-max-frequency = <108000000>;
            spi-rx-bus-width = <2>;
            spi-tx-bus-width = <2>;
        };
    };

...