* Rockchip Codec Digital Interface

Required properties:

- compatible: should be one of the following
   - "rockchip,codec-digital-v1"
   - "rockchip,rk3568-codec-digital"
   - "rockchip,rk3588-codec-digital"
   - "rockchip,rv1106-codec-digital"
   - "rockchip,rv1126-codec-digital"
- reg: physical base address of the controller and length of memory mapped
  region.
- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
- clock-names: clock names.
- rockchip,bclk-fs: configure the bclk fs.
- resets: a list of phandle + reset-specifer paris, one for each entry in reset-names.
- reset-names: reset names, should include "reset".
- rockchip,grf: the phandle of the syscon node for GRF register.

Optional properties:
- rockchip,clk-sync-mode: This is a boolean property, if present, using clk
  sync mode.
- rockchip,pwm-output-mode: This is a boolean property, if present, output pwm
  to drive spk.

Example:

rkacdc_dig: codec-digital@ff850000 {
	compatible = "rockchip,codec-digital-v1";
	reg = <0xff850000 0x1000>;
	clocks = <&cru CLK_ACDCDIG_ADC>, <&cru CLK_ACDCDIG_DAC>,
		 <&cru PCLK_ACDCDIG>;
	clock-names = "adc", "dac", "pclk";
	pinctrl-names = "default";
	pinctrl-0 = <&acodec_pins>;
	resets = <&cru SRST_ACDCDIG>;
	reset-names = "reset" ;
	rockchip,grf = <&grf>;
	status = "disabled";
};