ROCKCHIP HDMI PHY WITH INNO IP BLOCK

Required properties:
 - compatible : "rockchip,rk3228-hdmi-phy",
		"rockchip,rk3328-hdmi-phy";
 - reg : the address offset of register for hdmi phy configuration.
 - #phy-cells : must be 0. See ./phy-bindings.txt for details.
 - clocks and clock-names:
	- the "sysclk" clock is required by the phy module, used to system
	  control and register configuration
	- the "refclk" clock is reference crystal oscillator clock input
	  to PLL
 - #clock-cells: should be 0.
 - clock-output-names : shall be the corresponding names of the outputs.
 - rockchip,phy-table: the parameter table of hdmi phy configuration.

Example:

	hdmi_phy: hdmi-phy@12030000 {
		compatible = "rockchip,rk3228-hdmi-phy";
		reg = <0x12030000 0x10000>;
		#phy-cells = <0>;
		clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>;
		clock-names = "sysclk", "refclk";
		#clock-cells = <0>;
		clock-output-names = "hdmiphy_phy";
		rockchip,phy-table =
			<165000000 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08
				   0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>,
			<340000000 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08
				   0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd>,
			<594000000 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08
				   0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>;
		status = "disabled";
	};

Then the PHY can be used in other nodes such as:

	hdmi: hdmi@200a0000 {
		compatible = "rockchip,rk3228-dw-hdmi";
		...
		phys = <&hdmi_phy>;
		phy-names = "hdmi_phy";
		...
	};