Enabled Panthor support on the dts-level
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@ -2366,7 +2366,7 @@
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};
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};
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gpu: gpu@fb000000 {
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gpu_mali: gpu-mali@fb000000 {
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compatible = "arm,mali-bifrost";
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reg = <0x0 0xfb000000 0x0 0x200000>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
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@ -2391,7 +2391,7 @@
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status = "disabled";
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};
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gpu_panthor: gpu-panthor@fb000000 {
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gpu: gpu@fb000000 {
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compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
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reg = <0x0 0xfb000000 0x0 0x200000>;
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#cooling-cells = <2>;
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@ -5519,10 +5519,6 @@
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compatible = "rockchip,rk3588-dfi";
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reg = <0x00 0xfe060000 0x00 0x10000>;
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rockchip,pmu_grf = <&pmu1_grf>;
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clocks = <&cru PCLK_DDR_MON_CH0>, <&cru PCLK_DDR_MON_CH1>,
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<&cru PCLK_DDR_MON_CH2>, <&cru PCLK_DDR_MON_CH3>;
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clock-names = "pclk_ddr_mon_ch0", "pclk_ddr_mon_ch1",
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"pclk_ddr_mon_ch2", "pclk_ddr_mon_ch3";
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status = "disabled";
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};
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@ -6673,8 +6669,8 @@
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#address-cells = <1>;
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#size-cells = <1>;
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clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>,
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<&cru CLK_OTP_PHY_G>;
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clock-names = "otpc", "apb", "phy";
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<&cru CLK_OTPC_ARB>, <&cru CLK_OTP_PHY_G>;
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clock-names = "otpc", "apb", "arb", "phy";
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resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>,
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<&cru SRST_OTPC_ARB>;
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reset-names = "otpc", "apb", "arb";
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