870 lines
20 KiB
C
870 lines
20 KiB
C
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/*
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* Copyright 2012 Red Hat
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License version 2. See the file COPYING in the main
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* directory of this archive for more details.
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*
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* Authors: Matthew Garrett
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* Dave Airlie
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*
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* Portions of this code derived from cirrusfb.c:
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* drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
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*
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* Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
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*/
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <video/cirrus.h>
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#include "cirrus_drv.h"
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#define CIRRUS_LUT_SIZE 256
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#define PALETTE_INDEX 0x8
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#define PALETTE_DATA 0x9
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/*
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* This file contains setup code for the CRTC.
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*/
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static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
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{
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struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
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struct drm_device *dev = crtc->dev;
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struct cirrus_device *cdev = dev->dev_private;
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int i;
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if (!crtc->enabled)
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return;
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for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
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/* VGA registers */
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WREG8(PALETTE_INDEX, i);
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WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
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WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
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WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
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}
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}
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/*
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* The DRM core requires DPMS functions, but they make little sense in our
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* case and so are just stubs
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*/
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static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct drm_device *dev = crtc->dev;
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struct cirrus_device *cdev = dev->dev_private;
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u8 sr01, gr0e;
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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sr01 = 0x00;
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gr0e = 0x00;
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break;
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case DRM_MODE_DPMS_STANDBY:
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sr01 = 0x20;
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gr0e = 0x02;
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break;
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case DRM_MODE_DPMS_SUSPEND:
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sr01 = 0x20;
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gr0e = 0x04;
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break;
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case DRM_MODE_DPMS_OFF:
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sr01 = 0x20;
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gr0e = 0x06;
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break;
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default:
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return;
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}
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WREG8(SEQ_INDEX, 0x1);
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sr01 |= RREG8(SEQ_DATA) & ~0x20;
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WREG_SEQ(0x1, sr01);
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WREG8(GFX_INDEX, 0xe);
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gr0e |= RREG8(GFX_DATA) & ~0x06;
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WREG_GFX(0xe, gr0e);
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}
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/*
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* The core passes the desired mode to the CRTC code to see whether any
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* CRTC-specific modifications need to be made to it. We're in a position
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* to just pass that straight through, so this does nothing
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*/
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static bool cirrus_crtc_mode_fixup(struct drm_crtc *crtc,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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return true;
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}
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void cirrus_set_start_address(struct drm_crtc *crtc, unsigned offset)
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{
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struct cirrus_device *cdev = crtc->dev->dev_private;
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u32 addr;
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u8 tmp;
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addr = offset >> 2;
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WREG_CRT(0x0c, (u8)((addr >> 8) & 0xff));
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WREG_CRT(0x0d, (u8)(addr & 0xff));
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WREG8(CRT_INDEX, 0x1b);
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tmp = RREG8(CRT_DATA);
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tmp &= 0xf2;
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tmp |= (addr >> 16) & 0x01;
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tmp |= (addr >> 15) & 0x0c;
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WREG_CRT(0x1b, tmp);
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WREG8(CRT_INDEX, 0x1d);
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tmp = RREG8(CRT_DATA);
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tmp &= 0x7f;
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tmp |= (addr >> 12) & 0x80;
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WREG_CRT(0x1d, tmp);
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}
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/* cirrus is different - we will force move buffers out of VRAM */
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static int cirrus_crtc_do_set_base(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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int x, int y, int atomic)
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{
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struct cirrus_device *cdev = crtc->dev->dev_private;
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struct drm_gem_object *obj;
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struct cirrus_framebuffer *cirrus_fb;
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struct cirrus_bo *bo;
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int ret;
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u64 gpu_addr;
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/* push the previous fb to system ram */
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if (!atomic && fb) {
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cirrus_fb = to_cirrus_framebuffer(fb);
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obj = cirrus_fb->obj;
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bo = gem_to_cirrus_bo(obj);
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ret = cirrus_bo_reserve(bo, false);
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if (ret)
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return ret;
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cirrus_bo_push_sysram(bo);
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cirrus_bo_unreserve(bo);
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}
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cirrus_fb = to_cirrus_framebuffer(crtc->primary->fb);
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obj = cirrus_fb->obj;
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bo = gem_to_cirrus_bo(obj);
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ret = cirrus_bo_reserve(bo, false);
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if (ret)
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return ret;
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ret = cirrus_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
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if (ret) {
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cirrus_bo_unreserve(bo);
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return ret;
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}
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if (&cdev->mode_info.gfbdev->gfb == cirrus_fb) {
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/* if pushing console in kmap it */
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ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
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if (ret)
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DRM_ERROR("failed to kmap fbcon\n");
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}
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cirrus_bo_unreserve(bo);
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cirrus_set_start_address(crtc, (u32)gpu_addr);
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return 0;
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}
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static int cirrus_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb)
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{
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return cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
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}
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/*
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* The meat of this driver. The core passes us a mode and we have to program
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* it. The modesetting here is the bare minimum required to satisfy the qemu
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* emulation of this hardware, and running this against a real device is
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* likely to result in an inadequately programmed mode. We've already had
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* the opportunity to modify the mode, so whatever we receive here should
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* be something that can be correctly programmed and displayed
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*/
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static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode,
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int x, int y, struct drm_framebuffer *old_fb)
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{
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struct drm_device *dev = crtc->dev;
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struct cirrus_device *cdev = dev->dev_private;
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int hsyncstart, hsyncend, htotal, hdispend;
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int vtotal, vdispend;
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int tmp;
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int sr07 = 0, hdr = 0;
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htotal = mode->htotal / 8;
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hsyncend = mode->hsync_end / 8;
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hsyncstart = mode->hsync_start / 8;
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hdispend = mode->hdisplay / 8;
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vtotal = mode->vtotal;
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vdispend = mode->vdisplay;
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vdispend -= 1;
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vtotal -= 2;
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htotal -= 5;
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hdispend -= 1;
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hsyncstart += 1;
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hsyncend += 1;
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WREG_CRT(VGA_CRTC_V_SYNC_END, 0x20);
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WREG_CRT(VGA_CRTC_H_TOTAL, htotal);
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WREG_CRT(VGA_CRTC_H_DISP, hdispend);
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WREG_CRT(VGA_CRTC_H_SYNC_START, hsyncstart);
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WREG_CRT(VGA_CRTC_H_SYNC_END, hsyncend);
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WREG_CRT(VGA_CRTC_V_TOTAL, vtotal & 0xff);
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WREG_CRT(VGA_CRTC_V_DISP_END, vdispend & 0xff);
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tmp = 0x40;
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if ((vdispend + 1) & 512)
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tmp |= 0x20;
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WREG_CRT(VGA_CRTC_MAX_SCAN, tmp);
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/*
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* Overflow bits for values that don't fit in the standard registers
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*/
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tmp = 16;
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if (vtotal & 256)
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tmp |= 1;
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if (vdispend & 256)
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tmp |= 2;
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if ((vdispend + 1) & 256)
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tmp |= 8;
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if (vtotal & 512)
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tmp |= 32;
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if (vdispend & 512)
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tmp |= 64;
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WREG_CRT(VGA_CRTC_OVERFLOW, tmp);
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tmp = 0;
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/* More overflow bits */
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if ((htotal + 5) & 64)
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tmp |= 16;
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if ((htotal + 5) & 128)
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tmp |= 32;
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if (vtotal & 256)
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tmp |= 64;
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if (vtotal & 512)
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tmp |= 128;
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WREG_CRT(CL_CRT1A, tmp);
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/* Disable Hercules/CGA compatibility */
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WREG_CRT(VGA_CRTC_MODE, 0x03);
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WREG8(SEQ_INDEX, 0x7);
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sr07 = RREG8(SEQ_DATA);
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sr07 &= 0xe0;
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hdr = 0;
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switch (crtc->primary->fb->bits_per_pixel) {
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case 8:
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sr07 |= 0x11;
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break;
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case 16:
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sr07 |= 0xc1;
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hdr = 0xc0;
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break;
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case 24:
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sr07 |= 0x15;
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hdr = 0xc5;
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break;
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case 32:
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sr07 |= 0x19;
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hdr = 0xc5;
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break;
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default:
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return -1;
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}
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WREG_SEQ(0x7, sr07);
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/* Program the pitch */
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tmp = crtc->primary->fb->pitches[0] / 8;
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WREG_CRT(VGA_CRTC_OFFSET, tmp);
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/* Enable extended blanking and pitch bits, and enable full memory */
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tmp = 0x22;
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tmp |= (crtc->primary->fb->pitches[0] >> 7) & 0x10;
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tmp |= (crtc->primary->fb->pitches[0] >> 6) & 0x40;
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WREG_CRT(0x1b, tmp);
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/* Enable high-colour modes */
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WREG_GFX(VGA_GFX_MODE, 0x40);
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/* And set graphics mode */
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WREG_GFX(VGA_GFX_MISC, 0x01);
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WREG_HDR(hdr);
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return cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
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}
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/*
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* This is called before a mode is programmed. A typical use might be to
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* enable DPMS during the programming to avoid seeing intermediate stages,
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* but that's not relevant to us
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*/
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static void cirrus_crtc_prepare(struct drm_crtc *crtc)
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{
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}
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/*
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* This is called after a mode is programmed. It should reverse anything done
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* by the prepare function
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*/
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static void cirrus_crtc_commit(struct drm_crtc *crtc)
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{
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}
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static int cirrus_crtc_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags)
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{
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struct drm_device *dev = crtc->dev;
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unsigned long flags;
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struct drm_framebuffer *old_fb = crtc->primary->fb;
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crtc->primary->fb = fb;
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cirrus_crtc_do_set_base(crtc, old_fb, 0, 0, true);
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spin_lock_irqsave(&dev->event_lock, flags);
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if (event)
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drm_send_vblank_event(dev, 0, event);
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spin_unlock_irqrestore(&dev->event_lock, flags);
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drm_handle_vblank(dev, 0);
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return 0;
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}
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static void cirrus_argb_to_cursor(void *src , void __iomem *dst,
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uint32_t cursor_size)
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{
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uint8_t *pixel = (uint8_t *)src;
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const uint32_t row_size = cursor_size / 8;
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const uint32_t plane_size = row_size * cursor_size;
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uint32_t row_skip;
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void __iomem *plane_0 = dst;
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void __iomem *plane_1;
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uint32_t x;
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uint32_t y;
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switch (cursor_size) {
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case 32:
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row_skip = 0;
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plane_1 = plane_0 + plane_size;
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break;
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case 64:
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row_skip = row_size;
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plane_1 = plane_0 + row_size;
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break;
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default:
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DRM_DEBUG("Cursor plane format is undefined for given size");
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return;
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}
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for (y = 0; y < cursor_size; y++) {
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uint8_t bits_0 = 0;
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uint8_t bits_1 = 0;
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for (x = 0; x < cursor_size; x++) {
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uint8_t alpha = pixel[3];
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int intensity = pixel[0] + pixel[1] + pixel[2];
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intensity /= 3;
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bits_0 <<= 1;
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bits_1 <<= 1;
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if (alpha > 0x7f) {
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bits_1 |= 1;
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if (intensity > 0x7f)
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bits_0 |= 1;
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}
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if ((x % 8) == 7) {
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iowrite8(bits_0, plane_0);
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iowrite8(bits_1, plane_1);
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plane_0++;
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plane_1++;
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bits_0 = 0;
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bits_1 = 0;
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}
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pixel += 4;
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}
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plane_0 += row_skip;
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plane_1 += row_skip;
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}
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}
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static int cirrus_bo_to_cursor(struct cirrus_device *cdev,
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struct drm_file *file_priv, uint32_t handle,
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uint32_t cursor_size, uint32_t cursor_index)
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{
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const uint32_t pixel_count = cursor_size * cursor_size;
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const uint32_t plane_size = pixel_count / 8;
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const uint32_t cursor_offset = cursor_index * plane_size * 2;
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const uint32_t expected_pages =
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DIV_ROUND_UP(pixel_count * 4, PAGE_SIZE);
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int ret = 0;
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struct drm_device *dev = cdev->dev;
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struct drm_gem_object *obj;
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struct cirrus_bo *bo;
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struct ttm_bo_kmap_obj bo_kmap;
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bool is_iomem;
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struct ttm_tt *ttm;
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void *bo_ptr;
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if ((cursor_size == 32 && cursor_index >= 64) ||
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(cursor_size == 64 && cursor_index >= 16)) {
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DRM_ERROR("Cursor index is out of bounds\n");
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return -EINVAL;
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}
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mutex_lock(&dev->struct_mutex);
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obj = drm_gem_object_lookup(dev, file_priv, handle);
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if (obj == NULL) {
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ret = -ENOENT;
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DRM_ERROR("Buffer handle for cursor is invalid\n");
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goto out_unlock;
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}
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bo = gem_to_cirrus_bo(obj);
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ttm = bo->bo.ttm;
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if (bo->bo.num_pages < expected_pages) {
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ret = -EINVAL;
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DRM_ERROR("Buffer object for cursor is too small\n");
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goto out_unlock;
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}
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ret = cirrus_bo_reserve(bo, false);
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if (ret) {
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DRM_ERROR("Failed to reserver buffer object for cursor\n");
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goto out_unlock;
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}
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ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo_kmap);
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if (ret) {
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DRM_ERROR("Cursor failed kmap of buffer object\n");
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goto out_unreserve;
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}
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bo_ptr = ttm_kmap_obj_virtual(&bo_kmap, &is_iomem);
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cirrus_argb_to_cursor(bo_ptr, cdev->cursor_iomem + cursor_offset,
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cursor_size);
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ttm_bo_kunmap(&bo_kmap);
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out_unreserve:
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cirrus_bo_unreserve(bo);
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out_unlock:
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mutex_unlock(&dev->struct_mutex);
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return ret;
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}
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static int cirrus_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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uint32_t width, uint32_t height)
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{
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int ret;
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struct drm_device *dev = crtc->dev;
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struct cirrus_device *cdev = dev->dev_private;
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uint8_t cursor_index = 0;
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int sr12, sr13;
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if (handle == 0) {
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WREG8(SEQ_INDEX, 0x12);
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sr12 = RREG8(SEQ_DATA);
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sr12 &= 0xfe;
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WREG_SEQ(0x12, sr12);
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return 0;
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}
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if (width != height) {
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DRM_DEBUG("Cursors are expected to have square dimensions\n");
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return -EINVAL;
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}
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if (!(width == 32 || width == 64)) {
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DRM_ERROR("Cursor dimension are expected to be 32 or 64\n");
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return -EINVAL;
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}
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ret = cirrus_bo_to_cursor(cdev, file_priv, handle, width, cursor_index);
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if (ret)
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return ret;
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WREG8(SEQ_INDEX, 0x12);
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sr12 = RREG8(SEQ_DATA);
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sr12 &= 0xfa;
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sr12 |= 0x03; /* enables cursor and write to extra DAC LUT */
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if (width == 64)
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sr12 |= 0x04;
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WREG_SEQ(0x12, sr12);
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/* Background set to black, foreground set to white */
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WREG_PAL(0x00, 0, 0, 0);
|
|
WREG_PAL(0x0f, 255, 255, 255);
|
|
|
|
sr12 &= ~0x2; /* Disables writes to the extra LUT */
|
|
WREG_SEQ(0x12, sr12);
|
|
|
|
sr13 = 0;
|
|
if (width == 64)
|
|
sr13 |= (cursor_index & 0x0f) << 2;
|
|
else
|
|
sr13 |= cursor_index & 0x3f;
|
|
WREG_SEQ(0x13, sr13);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cirrus_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
|
|
{
|
|
struct drm_device *dev = crtc->dev;
|
|
struct cirrus_device *cdev = dev->dev_private;
|
|
int sr10, sr10_index;
|
|
int sr11, sr11_index;
|
|
|
|
if (x < 0)
|
|
x = 0;
|
|
if (x > 0x7ff)
|
|
x = 0x7ff;
|
|
if (y < 0)
|
|
y = 0;
|
|
if (y > 0x7ff)
|
|
y = 0x7ff;
|
|
|
|
sr10 = (x >> 3) & 0xff;
|
|
sr10_index = 0x10;
|
|
sr10_index |= (x & 0x07) << 5;
|
|
WREG_SEQ(sr10_index, sr10);
|
|
|
|
sr11 = (y >> 3) & 0xff;
|
|
sr11_index = 0x11;
|
|
sr11_index |= (y & 0x07) << 5;
|
|
WREG_SEQ(sr11_index, sr11);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* The core can pass us a set of gamma values to program. We actually only
|
|
* use this for 8-bit mode so can't perform smooth fades on deeper modes,
|
|
* but it's a requirement that we provide the function
|
|
*/
|
|
static void cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
|
|
u16 *blue, uint32_t start, uint32_t size)
|
|
{
|
|
struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
|
|
int i;
|
|
|
|
if (size != CIRRUS_LUT_SIZE)
|
|
return;
|
|
|
|
for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
|
|
cirrus_crtc->lut_r[i] = red[i];
|
|
cirrus_crtc->lut_g[i] = green[i];
|
|
cirrus_crtc->lut_b[i] = blue[i];
|
|
}
|
|
cirrus_crtc_load_lut(crtc);
|
|
}
|
|
|
|
/* Simple cleanup function */
|
|
static void cirrus_crtc_destroy(struct drm_crtc *crtc)
|
|
{
|
|
struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
|
|
|
|
drm_crtc_cleanup(crtc);
|
|
kfree(cirrus_crtc);
|
|
}
|
|
|
|
/* These provide the minimum set of functions required to handle a CRTC */
|
|
static const struct drm_crtc_funcs cirrus_crtc_funcs = {
|
|
.page_flip = cirrus_crtc_page_flip,
|
|
.cursor_set = cirrus_crtc_cursor_set,
|
|
.cursor_move = cirrus_crtc_cursor_move,
|
|
.gamma_set = cirrus_crtc_gamma_set,
|
|
.set_config = drm_crtc_helper_set_config,
|
|
.destroy = cirrus_crtc_destroy,
|
|
};
|
|
|
|
static const struct drm_crtc_helper_funcs cirrus_helper_funcs = {
|
|
.dpms = cirrus_crtc_dpms,
|
|
.mode_fixup = cirrus_crtc_mode_fixup,
|
|
.mode_set = cirrus_crtc_mode_set,
|
|
.mode_set_base = cirrus_crtc_mode_set_base,
|
|
.prepare = cirrus_crtc_prepare,
|
|
.commit = cirrus_crtc_commit,
|
|
.load_lut = cirrus_crtc_load_lut,
|
|
};
|
|
|
|
/* CRTC setup */
|
|
static void cirrus_crtc_init(struct drm_device *dev)
|
|
{
|
|
struct cirrus_device *cdev = dev->dev_private;
|
|
struct cirrus_crtc *cirrus_crtc;
|
|
int i;
|
|
|
|
cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
|
|
(CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),
|
|
GFP_KERNEL);
|
|
|
|
if (cirrus_crtc == NULL)
|
|
return;
|
|
|
|
drm_crtc_init(dev, &cirrus_crtc->base, &cirrus_crtc_funcs);
|
|
|
|
drm_mode_crtc_set_gamma_size(&cirrus_crtc->base, CIRRUS_LUT_SIZE);
|
|
cdev->mode_info.crtc = cirrus_crtc;
|
|
|
|
for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
|
|
cirrus_crtc->lut_r[i] = i;
|
|
cirrus_crtc->lut_g[i] = i;
|
|
cirrus_crtc->lut_b[i] = i;
|
|
}
|
|
|
|
drm_crtc_helper_add(&cirrus_crtc->base, &cirrus_helper_funcs);
|
|
}
|
|
|
|
/** Sets the color ramps on behalf of fbcon */
|
|
void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
|
|
u16 blue, int regno)
|
|
{
|
|
struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
|
|
|
|
cirrus_crtc->lut_r[regno] = red;
|
|
cirrus_crtc->lut_g[regno] = green;
|
|
cirrus_crtc->lut_b[regno] = blue;
|
|
}
|
|
|
|
/** Gets the color ramps on behalf of fbcon */
|
|
void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
|
|
u16 *blue, int regno)
|
|
{
|
|
struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
|
|
|
|
*red = cirrus_crtc->lut_r[regno];
|
|
*green = cirrus_crtc->lut_g[regno];
|
|
*blue = cirrus_crtc->lut_b[regno];
|
|
}
|
|
|
|
|
|
static bool cirrus_encoder_mode_fixup(struct drm_encoder *encoder,
|
|
const struct drm_display_mode *mode,
|
|
struct drm_display_mode *adjusted_mode)
|
|
{
|
|
return true;
|
|
}
|
|
|
|
static void cirrus_encoder_mode_set(struct drm_encoder *encoder,
|
|
struct drm_display_mode *mode,
|
|
struct drm_display_mode *adjusted_mode)
|
|
{
|
|
}
|
|
|
|
static void cirrus_encoder_dpms(struct drm_encoder *encoder, int state)
|
|
{
|
|
return;
|
|
}
|
|
|
|
static void cirrus_encoder_prepare(struct drm_encoder *encoder)
|
|
{
|
|
}
|
|
|
|
static void cirrus_encoder_commit(struct drm_encoder *encoder)
|
|
{
|
|
}
|
|
|
|
void cirrus_encoder_destroy(struct drm_encoder *encoder)
|
|
{
|
|
struct cirrus_encoder *cirrus_encoder = to_cirrus_encoder(encoder);
|
|
drm_encoder_cleanup(encoder);
|
|
kfree(cirrus_encoder);
|
|
}
|
|
|
|
static const struct drm_encoder_helper_funcs cirrus_encoder_helper_funcs = {
|
|
.dpms = cirrus_encoder_dpms,
|
|
.mode_fixup = cirrus_encoder_mode_fixup,
|
|
.mode_set = cirrus_encoder_mode_set,
|
|
.prepare = cirrus_encoder_prepare,
|
|
.commit = cirrus_encoder_commit,
|
|
};
|
|
|
|
static const struct drm_encoder_funcs cirrus_encoder_encoder_funcs = {
|
|
.destroy = cirrus_encoder_destroy,
|
|
};
|
|
|
|
static struct drm_encoder *cirrus_encoder_init(struct drm_device *dev)
|
|
{
|
|
struct drm_encoder *encoder;
|
|
struct cirrus_encoder *cirrus_encoder;
|
|
|
|
cirrus_encoder = kzalloc(sizeof(struct cirrus_encoder), GFP_KERNEL);
|
|
if (!cirrus_encoder)
|
|
return NULL;
|
|
|
|
encoder = &cirrus_encoder->base;
|
|
encoder->possible_crtcs = 0x1;
|
|
|
|
drm_encoder_init(dev, encoder, &cirrus_encoder_encoder_funcs,
|
|
DRM_MODE_ENCODER_DAC);
|
|
drm_encoder_helper_add(encoder, &cirrus_encoder_helper_funcs);
|
|
|
|
return encoder;
|
|
}
|
|
|
|
|
|
int cirrus_vga_get_modes(struct drm_connector *connector)
|
|
{
|
|
/* Just add a static list of modes */
|
|
drm_add_modes_noedid(connector, 640, 480);
|
|
drm_add_modes_noedid(connector, 800, 600);
|
|
if (cirrus_bpp > 24)
|
|
return 2;
|
|
|
|
drm_add_modes_noedid(connector, 1024, 768);
|
|
drm_add_modes_noedid(connector, 1280, 1024);
|
|
|
|
return 4;
|
|
}
|
|
|
|
static int cirrus_vga_mode_valid(struct drm_connector *connector,
|
|
struct drm_display_mode *mode)
|
|
{
|
|
/* Any mode we've added is valid */
|
|
return MODE_OK;
|
|
}
|
|
|
|
struct drm_encoder *cirrus_connector_best_encoder(struct drm_connector
|
|
*connector)
|
|
{
|
|
int enc_id = connector->encoder_ids[0];
|
|
struct drm_mode_object *obj;
|
|
struct drm_encoder *encoder;
|
|
|
|
/* pick the encoder ids */
|
|
if (enc_id) {
|
|
obj =
|
|
drm_mode_object_find(connector->dev, enc_id,
|
|
DRM_MODE_OBJECT_ENCODER);
|
|
if (!obj)
|
|
return NULL;
|
|
encoder = obj_to_encoder(obj);
|
|
return encoder;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
static enum drm_connector_status cirrus_vga_detect(struct drm_connector
|
|
*connector, bool force)
|
|
{
|
|
return connector_status_connected;
|
|
}
|
|
|
|
static void cirrus_connector_destroy(struct drm_connector *connector)
|
|
{
|
|
drm_connector_cleanup(connector);
|
|
kfree(connector);
|
|
}
|
|
|
|
struct drm_connector_helper_funcs cirrus_vga_connector_helper_funcs = {
|
|
.get_modes = cirrus_vga_get_modes,
|
|
.mode_valid = cirrus_vga_mode_valid,
|
|
.best_encoder = cirrus_connector_best_encoder,
|
|
};
|
|
|
|
struct drm_connector_funcs cirrus_vga_connector_funcs = {
|
|
.dpms = drm_helper_connector_dpms,
|
|
.detect = cirrus_vga_detect,
|
|
.fill_modes = drm_helper_probe_single_connector_modes,
|
|
.destroy = cirrus_connector_destroy,
|
|
};
|
|
|
|
static struct drm_connector *cirrus_vga_init(struct drm_device *dev)
|
|
{
|
|
struct drm_connector *connector;
|
|
struct cirrus_connector *cirrus_connector;
|
|
|
|
cirrus_connector = kzalloc(sizeof(struct cirrus_connector), GFP_KERNEL);
|
|
if (!cirrus_connector)
|
|
return NULL;
|
|
|
|
connector = &cirrus_connector->base;
|
|
|
|
drm_connector_init(dev, connector,
|
|
&cirrus_vga_connector_funcs, DRM_MODE_CONNECTOR_VGA);
|
|
|
|
drm_connector_helper_add(connector, &cirrus_vga_connector_helper_funcs);
|
|
|
|
return connector;
|
|
}
|
|
|
|
|
|
int cirrus_modeset_init(struct cirrus_device *cdev)
|
|
{
|
|
struct drm_encoder *encoder;
|
|
struct drm_connector *connector;
|
|
int ret;
|
|
|
|
drm_mode_config_init(cdev->dev);
|
|
cdev->mode_info.mode_config_initialized = true;
|
|
|
|
cdev->dev->mode_config.max_width = CIRRUS_MAX_FB_WIDTH;
|
|
cdev->dev->mode_config.max_height = CIRRUS_MAX_FB_HEIGHT;
|
|
|
|
cdev->dev->mode_config.fb_base = cdev->mc.vram_base;
|
|
cdev->dev->mode_config.preferred_depth = 24;
|
|
/* don't prefer a shadow on virt GPU */
|
|
cdev->dev->mode_config.prefer_shadow = 0;
|
|
|
|
cirrus_crtc_init(cdev->dev);
|
|
|
|
encoder = cirrus_encoder_init(cdev->dev);
|
|
if (!encoder) {
|
|
DRM_ERROR("cirrus_encoder_init failed\n");
|
|
return -1;
|
|
}
|
|
|
|
connector = cirrus_vga_init(cdev->dev);
|
|
if (!connector) {
|
|
DRM_ERROR("cirrus_vga_init failed\n");
|
|
return -1;
|
|
}
|
|
|
|
drm_mode_connector_attach_encoder(connector, encoder);
|
|
|
|
ret = cirrus_fbdev_init(cdev);
|
|
if (ret) {
|
|
DRM_ERROR("cirrus_fbdev_init failed\n");
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void cirrus_modeset_fini(struct cirrus_device *cdev)
|
|
{
|
|
cirrus_fbdev_fini(cdev);
|
|
|
|
if (cdev->mode_info.mode_config_initialized) {
|
|
drm_mode_config_cleanup(cdev->dev);
|
|
cdev->mode_info.mode_config_initialized = false;
|
|
}
|
|
}
|