181 lines
5.1 KiB
C
181 lines
5.1 KiB
C
/*
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* Copyright (C) 2013 Emilio López <emilio@elopez.com.ar>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Adjustable factor-based clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include "clk-factors.h"
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/*
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* DOC: basic adjustable factor-based clock that cannot gate
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*
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* Traits of this clock:
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* prepare - clk_prepare only ensures that parents are prepared
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* enable - clk_enable only ensures that parents are enabled
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* rate - rate is adjustable.
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* clk->rate = (parent->rate * N * (K + 1) >> P) / (M + 1)
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* parent - fixed parent. No clk_set_parent support
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*/
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struct clk_factors {
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struct clk_hw hw;
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void __iomem *reg;
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struct clk_factors_config *config;
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void (*get_factors) (u32 *rate, u32 parent, u8 *n, u8 *k, u8 *m, u8 *p);
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spinlock_t *lock;
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};
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#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
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#define SETMASK(len, pos) (((-1U) >> (31-len)) << (pos))
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#define CLRMASK(len, pos) (~(SETMASK(len, pos)))
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#define FACTOR_GET(bit, len, reg) (((reg) & SETMASK(len, bit)) >> (bit))
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#define FACTOR_SET(bit, len, reg, val) \
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(((reg) & CLRMASK(len, bit)) | (val << (bit)))
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static unsigned long clk_factors_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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u8 n = 1, k = 0, p = 0, m = 0;
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u32 reg;
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unsigned long rate;
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struct clk_factors *factors = to_clk_factors(hw);
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struct clk_factors_config *config = factors->config;
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/* Fetch the register value */
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reg = readl(factors->reg);
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/* Get each individual factor if applicable */
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if (config->nwidth != SUNXI_FACTORS_NOT_APPLICABLE)
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n = FACTOR_GET(config->nshift, config->nwidth, reg);
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if (config->kwidth != SUNXI_FACTORS_NOT_APPLICABLE)
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k = FACTOR_GET(config->kshift, config->kwidth, reg);
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if (config->mwidth != SUNXI_FACTORS_NOT_APPLICABLE)
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m = FACTOR_GET(config->mshift, config->mwidth, reg);
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if (config->pwidth != SUNXI_FACTORS_NOT_APPLICABLE)
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p = FACTOR_GET(config->pshift, config->pwidth, reg);
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/* Calculate the rate */
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rate = (parent_rate * n * (k + 1) >> p) / (m + 1);
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return rate;
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}
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static long clk_factors_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct clk_factors *factors = to_clk_factors(hw);
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factors->get_factors((u32 *)&rate, (u32)*parent_rate,
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NULL, NULL, NULL, NULL);
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return rate;
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}
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static int clk_factors_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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u8 n, k, m, p;
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u32 reg;
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struct clk_factors *factors = to_clk_factors(hw);
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struct clk_factors_config *config = factors->config;
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unsigned long flags = 0;
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factors->get_factors((u32 *)&rate, (u32)parent_rate, &n, &k, &m, &p);
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if (factors->lock)
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spin_lock_irqsave(factors->lock, flags);
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/* Fetch the register value */
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reg = readl(factors->reg);
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/* Set up the new factors - macros do not do anything if width is 0 */
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reg = FACTOR_SET(config->nshift, config->nwidth, reg, n);
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reg = FACTOR_SET(config->kshift, config->kwidth, reg, k);
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reg = FACTOR_SET(config->mshift, config->mwidth, reg, m);
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reg = FACTOR_SET(config->pshift, config->pwidth, reg, p);
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/* Apply them now */
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writel(reg, factors->reg);
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/* delay 500us so pll stabilizes */
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__delay((rate >> 20) * 500 / 2);
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if (factors->lock)
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spin_unlock_irqrestore(factors->lock, flags);
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return 0;
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}
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static const struct clk_ops clk_factors_ops = {
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.recalc_rate = clk_factors_recalc_rate,
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.round_rate = clk_factors_round_rate,
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.set_rate = clk_factors_set_rate,
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};
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/**
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* clk_register_factors - register a factors clock with
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* the clock framework
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* @dev: device registering this clock
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* @name: name of this clock
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* @parent_name: name of clock's parent
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* @flags: framework-specific flags
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* @reg: register address to adjust factors
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* @config: shift and width of factors n, k, m and p
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* @get_factors: function to calculate the factors for a given frequency
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* @lock: shared register lock for this clock
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*/
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struct clk *clk_register_factors(struct device *dev, const char *name,
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const char *parent_name,
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unsigned long flags, void __iomem *reg,
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struct clk_factors_config *config,
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void (*get_factors)(u32 *rate, u32 parent,
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u8 *n, u8 *k, u8 *m, u8 *p),
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spinlock_t *lock)
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{
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struct clk_factors *factors;
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struct clk *clk;
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struct clk_init_data init;
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/* allocate the factors */
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factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
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if (!factors) {
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pr_err("%s: could not allocate factors clk\n", __func__);
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return ERR_PTR(-ENOMEM);
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}
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init.name = name;
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init.ops = &clk_factors_ops;
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init.flags = flags;
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init.parent_names = (parent_name ? &parent_name : NULL);
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init.num_parents = (parent_name ? 1 : 0);
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/* struct clk_factors assignments */
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factors->reg = reg;
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factors->config = config;
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factors->lock = lock;
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factors->hw.init = &init;
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factors->get_factors = get_factors;
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/* register the clock */
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clk = clk_register(dev, &factors->hw);
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if (IS_ERR(clk))
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kfree(factors);
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return clk;
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}
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