475 lines
11 KiB
C
475 lines
11 KiB
C
/*
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* drivers/video/tegra/host/vic03/hw_tfbif_vic03.h
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*
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* Copyright (c) 2012, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/*
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* Function naming determines intended use:
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*
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* <x>_r(void) : Returns the offset for register <x>.
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*
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* <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
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*
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* <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
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*
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* <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
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* and masked to place it at field <y> of register <x>. This value
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* can be |'d with others to produce a full register value for
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* register <x>.
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*
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* <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
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* value can be ~'d and then &'d to clear the value of field <y> for
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* register <x>.
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*
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* <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
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* to place it at field <y> of register <x>. This value can be |'d
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* with others to produce a full register value for <x>.
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*
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* <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
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* <x> value 'r' after being shifted to place its LSB at bit 0.
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* This value is suitable for direct comparison with other unshifted
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* values appropriate for use in field <y> of register <x>.
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*
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* <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
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* field <y> of register <x>. This value is suitable for direct
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* comparison with unshifted values appropriate for use in field <y>
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* of register <x>.
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*/
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#ifndef __hw_tfbif_vic03_h__
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#define __hw_tfbif_vic03_h__
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/*This file is autogenerated. Do not edit. */
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static inline u32 tfbif_mccif_fifoctrl_r(void)
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{
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return 0x00001604;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_f(u32 v)
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{
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return (v & 0x1) << 0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_m(void)
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{
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return 0x1 << 0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_v(u32 r)
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{
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return (r >> 0) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_override_enable_f(void)
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{
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return 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_f(u32 v)
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{
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return (v & 0x1) << 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_m(void)
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{
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return 0x1 << 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_v(u32 r)
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{
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return (r >> 1) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_override_enable_f(void)
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{
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return 0x2;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_f(u32 v)
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{
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return (v & 0x1) << 2;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_m(void)
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{
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return 0x1 << 2;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_v(u32 r)
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{
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return (r >> 2) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrcl_mcle2x_enable_f(void)
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{
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return 0x4;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_f(u32 v)
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{
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return (v & 0x1) << 3;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_m(void)
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{
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return 0x1 << 3;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_v(u32 r)
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{
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return (r >> 3) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdmc_rdfast_enable_f(void)
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{
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return 0x8;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_f(u32 v)
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{
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return (v & 0x1) << 4;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_m(void)
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{
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return 0x1 << 4;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_v(u32 r)
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{
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return (r >> 4) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_wrmc_clle2x_enable_f(void)
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{
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return 0x10;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_f(u32 v)
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{
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return (v & 0x1) << 5;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_m(void)
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{
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return 0x1 << 5;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_v(u32 r)
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{
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return (r >> 5) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_rdcl_rdfast_enable_f(void)
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{
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return 0x20;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_f(u32 v)
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{
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return (v & 0x1) << 6;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_m(void)
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{
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return 0x1 << 6;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_v(u32 r)
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{
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return (r >> 6) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_cclk_override_enable_f(void)
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{
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return 0x40;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_f(u32 v)
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{
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return (v & 0x1) << 7;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_m(void)
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{
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return 0x1 << 7;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_v(u32 r)
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{
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return (r >> 7) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_rclk_ovr_mode_enable_f(void)
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{
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return 0x80;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_s(void)
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{
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return 1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_f(u32 v)
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{
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return (v & 0x1) << 8;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_m(void)
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{
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return 0x1 << 8;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_v(u32 r)
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{
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return (r >> 8) & 0x1;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_init_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_disable_v(void)
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{
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return 0x00000000;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_disable_f(void)
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{
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return 0x0;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_enable_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tfbif_mccif_fifoctrl_wclk_ovr_mode_enable_f(void)
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{
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return 0x100;
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}
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static inline u32 tfbif_mccif_fifoctrl1_v(void)
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{
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return 0x00001634;
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}
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static inline u32 tfbif_mccif_fifoctrl1_srd2mc_reorder_depth_limit_s(void)
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{
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return 16;
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}
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static inline u32 tfbif_mccif_fifoctrl1_srd2mc_reorder_depth_limit_f(u32 v)
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{
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return (v & 0xffff) << 0;
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}
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static inline u32 tfbif_mccif_fifoctrl1_srd2mc_reorder_depth_limit_m(void)
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{
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return 0xffff << 0;
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}
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static inline u32 tfbif_mccif_fifoctrl1_srd2mc_reorder_depth_limit_v(u32 r)
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{
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return (r >> 0) & 0xffff;
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}
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static inline u32 tfbif_mccif_fifoctrl1_srd2mc_reorder_depth_limit_init_v(void)
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{
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return 0x00000080;
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}
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static inline u32 tfbif_mccif_fifoctrl1_srd2mc_reorder_depth_limit_init_f(void)
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{
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return 0x80;
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}
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static inline u32 tfbif_mccif_fifoctrl1_swr2mc_reorder_depth_limit_s(void)
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{
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return 16;
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}
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static inline u32 tfbif_mccif_fifoctrl1_swr2mc_reorder_depth_limit_f(u32 v)
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{
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return (v & 0xffff) << 16;
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}
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static inline u32 tfbif_mccif_fifoctrl1_swr2mc_reorder_depth_limit_m(void)
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{
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return 0xffff << 16;
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}
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static inline u32 tfbif_mccif_fifoctrl1_swr2mc_reorder_depth_limit_v(u32 r)
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{
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return (r >> 16) & 0xffff;
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}
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static inline u32 tfbif_mccif_fifoctrl1_swr2mc_reorder_depth_limit_init_v(void)
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{
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return 0x00000040;
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|
}
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|
static inline u32 tfbif_mccif_fifoctrl1_swr2mc_reorder_depth_limit_init_f(void)
|
|
{
|
|
return 0x400000;
|
|
}
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|
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#endif /* __hw_tfbif_vic03_h__ */
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