218 lines
4.9 KiB
C
218 lines
4.9 KiB
C
/*
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* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Function naming determines intended use:
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*
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* <x>_r(void) : Returns the offset for register <x>.
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*
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* <x>_o(void) : Returns the offset for element <x>.
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*
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* <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
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*
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* <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
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*
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* <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
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* and masked to place it at field <y> of register <x>. This value
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* can be |'d with others to produce a full register value for
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* register <x>.
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*
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* <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
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* value can be ~'d and then &'d to clear the value of field <y> for
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* register <x>.
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*
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* <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
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* to place it at field <y> of register <x>. This value can be |'d
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* with others to produce a full register value for <x>.
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*
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* <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
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* <x> value 'r' after being shifted to place its LSB at bit 0.
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* This value is suitable for direct comparison with other unshifted
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* values appropriate for use in field <y> of register <x>.
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*
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* <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
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* field <y> of register <x>. This value is suitable for direct
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* comparison with unshifted values appropriate for use in field <y>
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* of register <x>.
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*/
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#ifndef _hw_tsec_h_
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#define _hw_tsec_h_
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static inline u32 tsec_irqsclr_r(void)
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{
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return 0x1004;
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}
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static inline u32 tsec_irqmset_r(void)
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{
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return 0x1010;
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}
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static inline u32 tsec_irqmset_wdtmr_set_f(void)
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{
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return 0x2;
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}
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static inline u32 tsec_irqmset_halt_set_f(void)
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{
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return 0x10;
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}
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static inline u32 tsec_irqmset_exterr_set_f(void)
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{
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return 0x20;
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}
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static inline u32 tsec_irqmset_swgen0_set_f(void)
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{
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return 0x40;
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}
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static inline u32 tsec_irqmset_swgen1_set_f(void)
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{
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return 0x80;
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}
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static inline u32 tsec_irqmset_ext_f(u32 v)
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{
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return (v & 0xff) << 8;
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}
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static inline u32 tsec_irqdest_r(void)
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{
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return 0x101c;
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}
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static inline u32 tsec_irqdest_host_halt_host_f(void)
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{
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return 0x10;
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}
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static inline u32 tsec_irqdest_host_exterr_host_f(void)
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{
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return 0x20;
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}
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static inline u32 tsec_irqdest_host_swgen0_host_f(void)
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{
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return 0x40;
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}
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static inline u32 tsec_irqdest_host_swgen1_host_f(void)
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{
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return 0x80;
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}
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static inline u32 tsec_irqdest_host_ext_f(u32 v)
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{
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return (v & 0xff) << 8;
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}
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static inline u32 tsec_itfen_r(void)
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{
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return 0x1048;
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}
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static inline u32 tsec_itfen_ctxen_enable_f(void)
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{
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return 0x1;
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}
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static inline u32 tsec_itfen_mthden_enable_f(void)
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{
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return 0x2;
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}
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static inline u32 tsec_idlestate_r(void)
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{
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return 0x104c;
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}
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static inline u32 tsec_cpuctl_r(void)
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{
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return 0x1100;
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}
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static inline u32 tsec_cpuctl_startcpu_true_f(void)
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{
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return 0x2;
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}
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static inline u32 tsec_bootvec_r(void)
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{
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return 0x1104;
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}
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static inline u32 tsec_bootvec_vec_f(u32 v)
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{
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return (v & 0xffffffff) << 0;
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}
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static inline u32 tsec_dmactl_r(void)
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{
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return 0x110c;
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}
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static inline u32 tsec_dmatrfbase_r(void)
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{
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return 0x1110;
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}
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static inline u32 tsec_dmatrfmoffs_r(void)
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{
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return 0x1114;
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}
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static inline u32 tsec_dmatrfmoffs_offs_f(u32 v)
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{
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return (v & 0xffff) << 0;
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}
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static inline u32 tsec_dmatrfcmd_r(void)
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{
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return 0x1118;
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}
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static inline u32 tsec_dmatrfcmd_idle_v(u32 r)
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{
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return (r >> 1) & 0x1;
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}
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static inline u32 tsec_dmatrfcmd_idle_true_v(void)
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{
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return 0x00000001;
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}
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static inline u32 tsec_dmatrfcmd_imem_f(u32 v)
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{
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return (v & 0x1) << 4;
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}
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static inline u32 tsec_dmatrfcmd_imem_true_f(void)
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{
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return 0x10;
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}
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static inline u32 tsec_dmatrfcmd_size_f(u32 v)
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{
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return (v & 0x7) << 8;
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}
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static inline u32 tsec_dmatrfcmd_size_256b_f(void)
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{
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return 0x600;
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}
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static inline u32 tsec_dmatrffboffs_r(void)
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{
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return 0x111c;
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}
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static inline u32 tsec_dmatrffboffs_offs_f(u32 v)
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{
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return (v & 0xffffffff) << 0;
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}
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static inline u32 tsec_thi_int_status_r(void)
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{
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return 0x78;
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}
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static inline u32 tsec_tegra_ctl_r(void)
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{
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return 0x1838;
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}
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static inline u32 tsec_tegra_ctl_tkfi_kfuse_m(void)
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{
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return 0x1 << 16;
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}
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static inline u32 tsec_scp_ctl_pkey_r(void)
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{
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return 0x1418;
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}
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static inline u32 tsec_scp_ctl_pkey_request_reload_s(void)
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{
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return 1;
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}
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static inline u32 tsec_scp_ctl_pkey_loaded_m(void)
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{
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return 0x1 << 1;
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}
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#endif
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