100 lines
2.3 KiB
C
100 lines
2.3 KiB
C
/*
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* drivers/video/tegra/host/t124/3dctx_t124.c
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*
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* Tegra Graphics Host 3d hardware context
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*
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* Copyright (c) 2011-2013, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "../nvhost_hwctx.h"
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#include "../dev.h"
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#include "t124.h"
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#include "hardware_t124.h"
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#include "../gk20a/gk20a.h"
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static void t124_ctx3d_free(struct kref *ref)
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{
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struct nvhost_hwctx *ctx = container_of(ref, struct nvhost_hwctx, ref);
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#if defined(CONFIG_TEGRA_GK20A)
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gk20a_free_channel(ctx, true);
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#endif
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kfree(ctx);
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}
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struct nvhost_hwctx *t124_3dctx_alloc(struct nvhost_hwctx_handler *h,
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struct nvhost_channel *ch)
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{
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struct nvhost_hwctx *ctx;
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nvhost_dbg_fn("");
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/* it seems odd to be allocating a channel here but the
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* t20/t30 notion of a channel is mapped on top of gk20a's
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* channel. this works because there is only one module
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* under gk20a's host (gr).
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*/
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/* call gk20a_channel_alloc */
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return NULL;
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kref_init(&ctx->ref);
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#if defined(CONFIG_TEGRA_GK20A)
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return gk20a_open_channel(ch, ctx);
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#else
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return ctx;
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#endif
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}
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void t124_3dctx_get(struct nvhost_hwctx *hwctx)
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{
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nvhost_dbg_fn("");
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kref_get(&hwctx->ref);
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}
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void t124_3dctx_put(struct nvhost_hwctx *hwctx)
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{
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nvhost_dbg_fn("");
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kref_put(&hwctx->ref, t124_ctx3d_free);
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}
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void t124_3dctx_save_push(struct nvhost_hwctx *ctx, struct nvhost_cdma *cdma)
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{
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nvhost_dbg_fn("");
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}
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int __init t124_nvhost_3dctx_handler_init(struct nvhost_hwctx_handler *h)
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{
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nvhost_dbg_fn("");
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h->alloc = t124_3dctx_alloc;
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h->get = t124_3dctx_get;
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h->put = t124_3dctx_put;
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h->save_push = t124_3dctx_save_push;
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return 0;
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}
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int __init t124_nvhost_mpectx_handler_init(struct nvhost_hwctx_handler *h)
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{
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nvhost_dbg_fn("");
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return 0;
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}
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