218 lines
5.0 KiB
C
218 lines
5.0 KiB
C
/*
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* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Function naming determines intended use:
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*
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* <x>_r(void) : Returns the offset for register <x>.
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*
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* <x>_o(void) : Returns the offset for element <x>.
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*
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* <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
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*
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* <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
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*
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* <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
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* and masked to place it at field <y> of register <x>. This value
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* can be |'d with others to produce a full register value for
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* register <x>.
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*
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* <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
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* value can be ~'d and then &'d to clear the value of field <y> for
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* register <x>.
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*
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* <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
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* to place it at field <y> of register <x>. This value can be |'d
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* with others to produce a full register value for <x>.
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*
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* <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
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* <x> value 'r' after being shifted to place its LSB at bit 0.
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* This value is suitable for direct comparison with other unshifted
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* values appropriate for use in field <y> of register <x>.
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*
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* <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
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* field <y> of register <x>. This value is suitable for direct
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* comparison with unshifted values appropriate for use in field <y>
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* of register <x>.
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*/
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#ifndef _hw_mc_gk20a_h_
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#define _hw_mc_gk20a_h_
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static inline u32 mc_intr_0_r(void)
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{
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return 0x00000100;
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}
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static inline u32 mc_intr_0_pfifo_pending_f(void)
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{
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return 0x100;
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}
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static inline u32 mc_intr_0_pgraph_pending_f(void)
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{
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return 0x1000;
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}
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static inline u32 mc_intr_0_pmu_pending_f(void)
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{
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return 0x1000000;
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}
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static inline u32 mc_intr_0_ltc_pending_f(void)
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{
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return 0x2000000;
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}
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static inline u32 mc_intr_0_priv_ring_pending_f(void)
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{
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return 0x40000000;
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}
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static inline u32 mc_intr_0_pbus_pending_f(void)
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{
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return 0x10000000;
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}
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static inline u32 mc_intr_mask_0_r(void)
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{
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return 0x00000640;
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}
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static inline u32 mc_intr_mask_0_pmu_enabled_f(void)
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{
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return 0x1000000;
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}
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static inline u32 mc_intr_en_0_r(void)
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{
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return 0x00000140;
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}
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static inline u32 mc_intr_en_0_inta_disabled_f(void)
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{
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return 0x0;
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}
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static inline u32 mc_intr_en_0_inta_hardware_f(void)
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{
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return 0x1;
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}
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static inline u32 mc_intr_en_1_r(void)
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{
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return 0x00000144;
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}
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static inline u32 mc_intr_en_1_inta_disabled_f(void)
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{
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return 0x0;
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}
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static inline u32 mc_enable_r(void)
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{
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return 0x00000200;
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}
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static inline u32 mc_enable_xbar_enabled_f(void)
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{
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return 0x4;
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}
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static inline u32 mc_enable_l2_enabled_f(void)
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{
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return 0x8;
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}
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static inline u32 mc_enable_pmedia_s(void)
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{
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return 1;
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}
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static inline u32 mc_enable_pmedia_f(u32 v)
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{
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return (v & 0x1) << 4;
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}
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static inline u32 mc_enable_pmedia_m(void)
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{
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return 0x1 << 4;
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}
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static inline u32 mc_enable_pmedia_v(u32 r)
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{
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return (r >> 4) & 0x1;
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}
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static inline u32 mc_enable_priv_ring_enabled_f(void)
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{
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return 0x20;
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}
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static inline u32 mc_enable_ce0_m(void)
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{
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return 0x1 << 6;
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}
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static inline u32 mc_enable_pfifo_enabled_f(void)
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{
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return 0x100;
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}
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static inline u32 mc_enable_pgraph_enabled_f(void)
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{
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return 0x1000;
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}
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static inline u32 mc_enable_pwr_v(u32 r)
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{
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return (r >> 13) & 0x1;
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}
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static inline u32 mc_enable_pwr_disabled_v(void)
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{
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return 0x00000000;
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}
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static inline u32 mc_enable_pwr_enabled_f(void)
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{
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return 0x2000;
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}
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static inline u32 mc_enable_pfb_enabled_f(void)
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{
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return 0x100000;
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}
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static inline u32 mc_enable_ce2_m(void)
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{
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return 0x1 << 21;
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}
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static inline u32 mc_enable_ce2_enabled_f(void)
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{
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return 0x200000;
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}
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static inline u32 mc_enable_blg_enabled_f(void)
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{
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return 0x8000000;
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}
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static inline u32 mc_enable_perfmon_enabled_f(void)
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{
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return 0x10000000;
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}
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static inline u32 mc_enable_hub_enabled_f(void)
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{
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return 0x20000000;
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}
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static inline u32 mc_enable_pb_r(void)
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{
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return 0x00000204;
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}
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static inline u32 mc_enable_pb_0_s(void)
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{
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return 1;
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}
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static inline u32 mc_enable_pb_0_f(u32 v)
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{
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return (v & 0x1) << 0;
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}
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static inline u32 mc_enable_pb_0_m(void)
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{
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return 0x1 << 0;
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}
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static inline u32 mc_enable_pb_0_v(u32 r)
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{
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return (r >> 0) & 0x1;
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}
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static inline u32 mc_enable_pb_0_enabled_v(void)
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{
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return 0x00000001;
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}
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static inline u32 mc_enable_pb_sel_f(u32 v, u32 i)
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{
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return (v & 0x1) << (0 + i*1);
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}
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#endif
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