251 lines
6.1 KiB
C
251 lines
6.1 KiB
C
/*
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* drivers/video/tegra/dc/dc_priv.h
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*
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* Copyright (C) 2010 Google, Inc.
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* Author: Erik Gilling <konkers@android.com>
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*
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* Copyright (c) 2010-2014, NVIDIA CORPORATION, All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __DRIVERS_VIDEO_TEGRA_DC_DC_PRIV_DEFS_H
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#define __DRIVERS_VIDEO_TEGRA_DC_DC_PRIV_DEFS_H
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/wait.h>
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#include <linux/fb.h>
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/nvhost.h>
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#include <linux/types.h>
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#include <linux/of.h>
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#include <linux/platform_data/tegra_dc.h>
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#include <linux/platform_data/tegra_dc_ext.h>
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#include <linux/platform_data/tegra_fb.h>
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#include <linux/platform_data/tegra_hdmi_audio.h>
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#include "dc_reg.h"
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/* Pad pitch to 256-byte boundary. */
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#define TEGRA_LINEAR_PITCH_ALIGNMENT 256
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#define NEED_UPDATE_EMC_ON_EVERY_FRAME (windows_idle_detection_time == 0)
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/* 28 bit offset for window clip number */
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#define CURSOR_CLIP_SHIFT_BITS(win) (win << 28)
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#define CURSOR_CLIP_GET_WINDOW(reg) ((reg >> 28) & 3)
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/* Use runtime check to replace the "ifdef"s. */
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static inline int is_tegra114(void)
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{
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return of_machine_is_compatible("nvidia,tegra114");
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}
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static inline int is_tegra124(void)
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{
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return of_machine_is_compatible("nvidia,tegra124");
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}
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static inline u32 ALL_UF_INT(void)
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{
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#if defined(CONFIG_ARCH_TEGRA_124_SOC)
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if (is_tegra124())
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return WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT | HC_UF_INT |
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WIN_D_UF_INT | WIN_T_UF_INT;
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#endif
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return WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
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}
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struct tegra_dc_blend {
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unsigned *z;
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unsigned *flags;
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u8 *alpha;
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};
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struct tegra_dc;
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struct tegra_dc_out_ops {
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/* initialize output. dc clocks are not on at this point */
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int (*init)(struct tegra_dc *dc);
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/* destroy output. dc clocks are not on at this point */
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void (*destroy)(struct tegra_dc *dc);
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/* detect connected display. can sleep.*/
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bool (*detect)(struct tegra_dc *dc);
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/* enable output. dc clocks are on at this point */
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void (*enable)(struct tegra_dc *dc);
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/* enable dc client. Panel is enable at this point */
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void (*postpoweron)(struct tegra_dc *dc);
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/* disable output. dc clocks are on at this point */
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void (*disable)(struct tegra_dc *dc);
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/* dc client is disabled. dc clocks are on at this point */
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void (*postpoweroff) (struct tegra_dc *dc);
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/* hold output. keeps dc clocks on. */
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void (*hold)(struct tegra_dc *dc);
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/* release output. dc clocks may turn off after this. */
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void (*release)(struct tegra_dc *dc);
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/* idle routine of output. dc clocks may turn off after this. */
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void (*idle)(struct tegra_dc *dc);
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/* suspend output. dc clocks are on at this point */
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void (*suspend)(struct tegra_dc *dc);
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/* resume output. dc clocks are on at this point */
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void (*resume)(struct tegra_dc *dc);
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/* mode filter. to provide a list of supported modes*/
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bool (*mode_filter)(const struct tegra_dc *dc,
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struct fb_videomode *mode);
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/* setup pixel clock and parent clock programming */
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long (*setup_clk)(struct tegra_dc *dc, struct clk *clk);
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/* enable output before dc is fully enabled in order to get
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* info such as panel mode for dc enablement.
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*/
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bool (*early_enable)(struct tegra_dc *dc);
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};
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struct tegra_dc_shift_clk_div {
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unsigned long mul; /* numerator */
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unsigned long div; /* denominator */
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};
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struct tegra_fb_info {
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struct tegra_dc_win *win;
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struct platform_device *ndev;
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struct fb_info *info;
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bool valid;
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struct resource *fb_mem;
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int xres;
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int yres;
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int curr_xoffset;
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int curr_yoffset;
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struct fb_videomode mode;
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phys_addr_t phys_start;
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};
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struct tegra_dc {
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struct platform_device *ndev;
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struct tegra_dc_platform_data *pdata;
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void __iomem *base;
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int irq;
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struct clk *clk;
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struct clk *emc_clk;
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unsigned long bw_kbps; /* bandwidth in KBps */
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unsigned long new_bw_kbps;
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struct tegra_dc_shift_clk_div shift_clk_div;
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u32 powergate_id;
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bool connected;
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bool enabled;
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bool suspended;
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struct tegra_dc_out *out;
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struct tegra_dc_out_ops *out_ops;
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void *out_data;
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struct tegra_dc_mode mode;
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s64 frametime_ns;
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struct tegra_dc_win *windows;
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struct tegra_dc_blend blend;
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int n_windows;
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#ifdef CONFIG_TEGRA_DC_CMU
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struct tegra_dc_cmu cmu;
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#endif
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wait_queue_head_t wq;
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wait_queue_head_t timestamp_wq;
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struct mutex lock;
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struct mutex one_shot_lock;
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struct mutex one_shot_lp_lock;
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struct resource *fb_mem;
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struct tegra_fb_info *fb;
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struct completion fb_ready;
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struct {
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u32 id;
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u32 min;
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u32 max;
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} *syncpt;
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u32 vblank_syncpt;
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u32 *win_syncpt;
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unsigned long int valid_windows;
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unsigned long underflow_mask;
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struct work_struct reset_work;
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struct completion frame_end_complete;
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struct completion crc_complete;
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bool crc_pending;
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struct work_struct vblank_work;
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long vblank_ref_count;
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struct work_struct vpulse2_work;
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long vpulse2_ref_count;
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struct {
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u64 underflows;
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u64 underflows_a;
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u64 underflows_b;
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u64 underflows_c;
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#if defined(CONFIG_ARCH_TEGRA_124_SOC)
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u64 underflows_d;
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u64 underflows_h;
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u64 underflows_t;
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#endif
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} stats;
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struct tegra_dc_ext *ext;
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struct tegra_dc_feature *feature;
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int gen1_blend_num;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *debugdir;
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#endif
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struct tegra_dc_lut fb_lut;
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struct delayed_work underflow_work;
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u32 one_shot_delay_ms;
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struct delayed_work one_shot_work;
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s64 frame_end_timestamp;
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atomic_t frame_end_ref;
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bool mode_dirty;
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struct tegra_edid *edid;
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struct backlight_device *bl_device;
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};
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static inline int get_dc_n_windows(struct tegra_dc *dc)
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{
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if (is_tegra124()) {
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if (strcmp(dev_name(&dc->ndev->dev), "tegradc.0") == 0)
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return 4;
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else
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return 3;
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}
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if (is_tegra114())
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return 3;
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pr_err("Get DC windows number: Unsupported Tegra SOC.\n");
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BUG();
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return 0;
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}
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#endif
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