184 lines
4.5 KiB
C
184 lines
4.5 KiB
C
/*
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* Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/bug.h>
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#include <linux/tegra-soc.h>
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#include "fuse.h"
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#define CPU_PROCESS_CORNERS_NUM 2
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#define GPU_PROCESS_CORNERS_NUM 2
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#define CORE_PROCESS_CORNERS_NUM 2
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#define FUSE_CPU_SPEEDO_0 0x14
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#define FUSE_CPU_SPEEDO_1 0x2c
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#define FUSE_CPU_SPEEDO_2 0x30
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#define FUSE_SOC_SPEEDO_0 0x34
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#define FUSE_SOC_SPEEDO_1 0x38
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#define FUSE_SOC_SPEEDO_2 0x3c
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#define FUSE_CPU_IDDQ 0x18
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#define FUSE_SOC_IDDQ 0x40
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#define FUSE_GPU_IDDQ 0x128
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#define FUSE_FT_REV 0x28
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enum {
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THRESHOLD_INDEX_0,
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THRESHOLD_INDEX_1,
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THRESHOLD_INDEX_COUNT,
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};
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static int cpu_speedo_0_value;
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static int cpu_speedo_1_value;
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static int soc_speedo_0_value;
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static int soc_speedo_1_value;
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static int soc_speedo_2_value;
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static int soc_speedo_id;
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static int cpu_iddq_value;
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static int gpu_iddq_value;
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static int soc_iddq_value;
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static const u32 cpu_process_speedos[][CPU_PROCESS_CORNERS_NUM] = {
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{2190, UINT_MAX},
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{0, UINT_MAX},
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};
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static const u32 gpu_process_speedos[][GPU_PROCESS_CORNERS_NUM] = {
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{1965, UINT_MAX},
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{0, UINT_MAX},
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};
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static const u32 core_process_speedos[][CORE_PROCESS_CORNERS_NUM] = {
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{2061, UINT_MAX},
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{0, UINT_MAX},
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};
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static void rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info,
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int *threshold, struct device *dev)
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{
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int sku = sku_info->sku_id;
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/* Assign to default */
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sku_info->cpu_speedo_id = 0;
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sku_info->soc_speedo_id = 0;
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sku_info->gpu_speedo_id = 0;
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*threshold = THRESHOLD_INDEX_0;
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switch (sku) {
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case 0x00: /* Eng sku */
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case 0x0F:
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/* Using the default */
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break;
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case 0x81:
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case 0x83:
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sku_info->cpu_speedo_id = 2;
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break;
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case 0x87:
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sku_info->cpu_speedo_id = 5;
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sku_info->gpu_speedo_id = 1;
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break;
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case 0x07:
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sku_info->cpu_speedo_id = 1;
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sku_info->soc_speedo_id = 1;
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sku_info->gpu_speedo_id = 1;
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*threshold = THRESHOLD_INDEX_1;
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break;
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default:
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dev_err(dev, "Unknown SKU %d\n", sku);
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/* Using the default for the error case */
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break;
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}
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soc_speedo_id = sku_info->soc_speedo_id;
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}
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void tegra124_init_speedo_data(struct tegra_sku_info *sku_info,
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struct device *dev)
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{
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int i;
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int threshold;
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BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) !=
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THRESHOLD_INDEX_COUNT);
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BUILD_BUG_ON(ARRAY_SIZE(gpu_process_speedos) !=
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THRESHOLD_INDEX_COUNT);
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BUILD_BUG_ON(ARRAY_SIZE(core_process_speedos) !=
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THRESHOLD_INDEX_COUNT);
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cpu_speedo_0_value = tegra30_fuse_readl(FUSE_CPU_SPEEDO_0);
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cpu_speedo_1_value = tegra30_fuse_readl(FUSE_CPU_SPEEDO_1);
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/* GPU Speedo is stored in CPU_SPEEDO_2 */
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sku_info->gpu_speedo_value = tegra30_fuse_readl(FUSE_CPU_SPEEDO_2);
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soc_speedo_0_value = tegra30_fuse_readl(FUSE_SOC_SPEEDO_0);
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soc_speedo_1_value = tegra30_fuse_readl(FUSE_SOC_SPEEDO_1);
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soc_speedo_2_value = tegra30_fuse_readl(FUSE_SOC_SPEEDO_2);
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cpu_iddq_value = tegra30_fuse_readl(FUSE_CPU_IDDQ);
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soc_iddq_value = tegra30_fuse_readl(FUSE_SOC_IDDQ);
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gpu_iddq_value = tegra30_fuse_readl(FUSE_GPU_IDDQ);
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sku_info->cpu_speedo_value = cpu_speedo_0_value;
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if (sku_info->cpu_speedo_value == 0) {
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dev_warn(dev, "Warning: Speedo value not fused.\n");
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WARN_ON(1);
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return;
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}
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rev_sku_to_speedo_ids(sku_info, &threshold, dev);
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sku_info->cpu_iddq_value = tegra30_fuse_readl(FUSE_CPU_IDDQ);
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for (i = 0; i < GPU_PROCESS_CORNERS_NUM; i++)
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if (sku_info->gpu_speedo_value <
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gpu_process_speedos[threshold][i])
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break;
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sku_info->gpu_process_id = i;
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for (i = 0; i < CPU_PROCESS_CORNERS_NUM; i++)
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if (sku_info->cpu_speedo_value <
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cpu_process_speedos[threshold][i])
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break;
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sku_info->cpu_process_id = i;
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for (i = 0; i < CORE_PROCESS_CORNERS_NUM; i++)
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if (soc_speedo_0_value <
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core_process_speedos[threshold][i])
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break;
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sku_info->core_process_id = i;
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dev_dbg(dev, "GPU Speedo ID=%d, Speedo Value=%d\n",
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sku_info->gpu_speedo_id, sku_info->gpu_speedo_value);
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}
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int tegra124_get_core_speedo_mv(void)
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{
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switch (soc_speedo_id) {
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case 0:
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case 1:
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return 1150;
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default:
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BUG();
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}
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}
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