113 lines
3.2 KiB
C
113 lines
3.2 KiB
C
/*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MEDIA_VIDEO_TEGRA_NVAVP_OS_H
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#define __MEDIA_VIDEO_TEGRA_NVAVP_OS_H
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#include <linux/types.h>
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#include "linux/nvmap.h"
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#define NVE2_AVP (0x0000E276)
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struct nv_e276_control {
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u32 reserved00[5];
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u32 dma_start;
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u32 reserved01[2];
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u32 dma_end;
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u32 reserved02[7];
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u32 put;
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u32 reserved03[15];
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u32 get;
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u32 reserved04[9];
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u32 sync_pt_incr_trap_enable;
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u32 watchdog_timeout;
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u32 idle_notify_enable;
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u32 idle_notify_delay;
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u32 idle_clk_enable;
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u32 iram_clk_gating;
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u32 idle;
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u32 outbox_data;
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u32 app_intr_enable;
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u32 app_start_time;
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u32 app_in_iram;
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u32 iram_ucode_addr;
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u32 iram_ucode_size;
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u32 dbg_state[57];
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u32 os_method_data[16];
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u32 app_method_data[128];
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};
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#define NVE26E_HOST1X_INCR_SYNCPT (0x00000000)
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#define NVE26E_HOST1X_INCR_SYNCPT_COND_OP_DONE (0x00000001)
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#define NVE26E_CH_OPCODE_INCR(addr, count) \
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/* op, addr, count */ \
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((1UL << 28) | ((addr) << 16) | (count))
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#define NVE26E_CH_OPCODE_IMM(addr, value) \
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/* op, addr, count */ \
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((4UL << 28) | ((addr) << 16) | (value))
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#define NVE26E_CH_OPCODE_GATHER(off, ins, type, cnt) \
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/* op, offset, insert, type, count */ \
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((6UL << 28) | ((off) << 16) | ((ins) << 15) | ((type) << 14) | cnt)
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/* AVP OS methods */
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#define NVE276_NOP (0x00000080)
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#define NVE276_SET_APP_TIMEOUT (0x00000084)
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#define NVE276_SET_MICROCODE_A (0x00000085)
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#define NVE276_SET_MICROCODE_B (0x00000086)
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#define NVE276_SET_MICROCODE_C (0x00000087)
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/* Interrupt codes through inbox/outbox data codes (cpu->avp or avp->cpu) */
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#define NVE276_OS_INTERRUPT_NOP (0x00000000) /* wake up avp */
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#define NVE276_OS_INTERRUPT_TIMEOUT (0x00000001)
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#define NVE276_OS_INTERRUPT_SEMAPHORE_AWAKEN (0x00000002)
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#define NVE276_OS_INTERRUPT_EXECUTE_AWAKEN (0x00000004)
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#define NVE276_OS_INTERRUPT_DEBUG_STRING (0x00000008)
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#define NVE276_OS_INTERRUPT_DH_KEYEXCHANGE (0x00000010)
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#define NVE276_OS_INTERRUPT_APP_NOTIFY (0x00000020)
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#define NVE276_OS_INTERRUPT_VIDEO_IDLE (0x00000040)
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#define NVE276_OS_INTERRUPT_AUDIO_IDLE (0x00000080)
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#define NVE276_OS_INTERRUPT_SYNCPT_INCR_TRAP (0x00002000)
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#define NVE276_OS_INTERRUPT_AVP_BREAKPOINT (0x00800000)
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#define NVE276_OS_INTERRUPT_AVP_FATAL_ERROR (0x01000000)
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/* Get sync point id from avp->cpu data */
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#define NVE276_OS_SYNCPT_INCR_TRAP_GET_SYNCPT(x) (((x)>>14)&0x1f)
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struct nvavp_os_info {
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u32 entry_offset;
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u32 control_offset;
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u32 debug_offset;
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void *data;
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u32 size;
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dma_addr_t phys;
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void *os_bin;
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dma_addr_t reset_addr;
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};
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struct nvavp_ucode_info {
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void *data;
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u32 size;
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dma_addr_t phys;
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void *ucode_bin;
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};
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#endif /* __MEDIA_VIDEO_TEGRA_NVAVP_OS_H */
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