359 lines
8.0 KiB
C
359 lines
8.0 KiB
C
#include <linux/types.h>
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#include <asm/delay.h>
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#include <irq.h>
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#include <hwregs/intr_vect.h>
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#include <hwregs/intr_vect_defs.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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#include <hwregs/asm/mmu_defs_asm.h>
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#include <hwregs/supp_reg.h>
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#include <linux/atomic.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/timex.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/cpumask.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#define IPI_SCHEDULE 1
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#define IPI_CALL 2
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#define IPI_FLUSH_TLB 4
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#define IPI_BOOT 8
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#define FLUSH_ALL (void*)0xffffffff
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/* Vector of locks used for various atomic operations */
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spinlock_t cris_atomic_locks[] = {
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[0 ... LOCK_COUNT - 1] = __SPIN_LOCK_UNLOCKED(cris_atomic_locks)
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};
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/* CPU masks */
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cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
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EXPORT_SYMBOL(phys_cpu_present_map);
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/* Variables used during SMP boot */
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volatile int cpu_now_booting = 0;
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volatile struct thread_info *smp_init_current_idle_thread;
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/* Variables used during IPI */
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static DEFINE_SPINLOCK(call_lock);
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static DEFINE_SPINLOCK(tlbstate_lock);
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struct call_data_struct {
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void (*func) (void *info);
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void *info;
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int wait;
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};
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static struct call_data_struct * call_data;
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static struct mm_struct* flush_mm;
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static struct vm_area_struct* flush_vma;
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static unsigned long flush_addr;
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/* Mode registers */
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static unsigned long irq_regs[NR_CPUS] = {
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regi_irq,
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regi_irq2
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};
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static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
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static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
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static struct irqaction irq_ipi = {
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.handler = crisv32_ipi_interrupt,
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.flags = IRQF_DISABLED,
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.name = "ipi",
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};
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extern void cris_mmu_init(void);
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extern void cris_timer_init(void);
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/* SMP initialization */
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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int i;
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/* From now on we can expect IPIs so set them up */
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setup_irq(IPI_INTR_VECT, &irq_ipi);
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/* Mark all possible CPUs as present */
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for (i = 0; i < max_cpus; i++)
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cpumask_set_cpu(i, &phys_cpu_present_map);
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}
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void smp_prepare_boot_cpu(void)
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{
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/* PGD pointer has moved after per_cpu initialization so
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* update the MMU.
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*/
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pgd_t **pgd;
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pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
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SUPP_BANK_SEL(1);
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SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
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SUPP_BANK_SEL(2);
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SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
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set_cpu_online(0, true);
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cpumask_set_cpu(0, &phys_cpu_present_map);
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set_cpu_possible(0, true);
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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}
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/* Bring one cpu online.*/
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static int __init
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smp_boot_one_cpu(int cpuid, struct task_struct idle)
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{
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unsigned timeout;
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cpumask_t cpu_mask;
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cpumask_clear(&cpu_mask);
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task_thread_info(idle)->cpu = cpuid;
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/* Information to the CPU that is about to boot */
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smp_init_current_idle_thread = task_thread_info(idle);
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cpu_now_booting = cpuid;
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/* Kick it */
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set_cpu_online(cpuid, true);
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cpumask_set_cpu(cpuid, &cpu_mask);
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send_ipi(IPI_BOOT, 0, cpu_mask);
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set_cpu_online(cpuid, false);
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/* Wait for CPU to come online */
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for (timeout = 0; timeout < 10000; timeout++) {
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if(cpu_online(cpuid)) {
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cpu_now_booting = 0;
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smp_init_current_idle_thread = NULL;
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return 0; /* CPU online */
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}
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udelay(100);
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barrier();
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}
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printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
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return -1;
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}
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/* Secondary CPUs starts using C here. Here we need to setup CPU
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* specific stuff such as the local timer and the MMU. */
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void __init smp_callin(void)
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{
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int cpu = cpu_now_booting;
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reg_intr_vect_rw_mask vect_mask = {0};
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/* Initialise the idle task for this CPU */
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atomic_inc(&init_mm.mm_count);
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current->active_mm = &init_mm;
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/* Set up MMU */
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cris_mmu_init();
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__flush_tlb_all();
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/* Setup local timer. */
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cris_timer_init();
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/* Enable IRQ and idle */
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REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
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crisv32_unmask_irq(IPI_INTR_VECT);
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crisv32_unmask_irq(TIMER0_INTR_VECT);
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preempt_disable();
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notify_cpu_starting(cpu);
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local_irq_enable();
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set_cpu_online(cpu, true);
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cpu_startup_entry(CPUHP_ONLINE);
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}
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/* Stop execution on this CPU.*/
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void stop_this_cpu(void* dummy)
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{
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local_irq_disable();
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asm volatile("halt");
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}
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/* Other calls */
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void smp_send_stop(void)
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{
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smp_call_function(stop_this_cpu, NULL, 0);
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}
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int setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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/* cache_decay_ticks is used by the scheduler to decide if a process
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* is "hot" on one CPU. A higher value means a higher penalty to move
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* a process to another CPU. Our cache is rather small so we report
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* 1 tick.
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*/
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unsigned long cache_decay_ticks = 1;
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int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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smp_boot_one_cpu(cpu, tidle);
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return cpu_online(cpu) ? 0 : -ENOSYS;
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}
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void smp_send_reschedule(int cpu)
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{
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cpumask_t cpu_mask;
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cpumask_clear(&cpu_mask);
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cpumask_set_cpu(cpu, &cpu_mask);
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send_ipi(IPI_SCHEDULE, 0, cpu_mask);
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}
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/* TLB flushing
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*
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* Flush needs to be done on the local CPU and on any other CPU that
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* may have the same mapping. The mm->cpu_vm_mask is used to keep track
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* of which CPUs that a specific process has been executed on.
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*/
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void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
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{
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unsigned long flags;
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cpumask_t cpu_mask;
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spin_lock_irqsave(&tlbstate_lock, flags);
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cpu_mask = (mm == FLUSH_ALL ? cpu_all_mask : *mm_cpumask(mm));
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cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
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flush_mm = mm;
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flush_vma = vma;
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flush_addr = addr;
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send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
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spin_unlock_irqrestore(&tlbstate_lock, flags);
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}
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void flush_tlb_all(void)
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{
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__flush_tlb_all();
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flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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__flush_tlb_mm(mm);
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flush_tlb_common(mm, FLUSH_ALL, 0);
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/* No more mappings in other CPUs */
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cpumask_clear(mm_cpumask(mm));
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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}
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void flush_tlb_page(struct vm_area_struct *vma,
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unsigned long addr)
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{
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__flush_tlb_page(vma, addr);
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flush_tlb_common(vma->vm_mm, vma, addr);
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}
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/* Inter processor interrupts
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*
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* The IPIs are used for:
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* * Force a schedule on a CPU
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* * FLush TLB on other CPUs
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* * Call a function on other CPUs
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*/
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int send_ipi(int vector, int wait, cpumask_t cpu_mask)
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{
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int i = 0;
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reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
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int ret = 0;
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/* Calculate CPUs to send to. */
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cpumask_and(&cpu_mask, &cpu_mask, cpu_online_mask);
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/* Send the IPI. */
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for_each_cpu(i, &cpu_mask)
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{
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ipi.vector |= vector;
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REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
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}
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/* Wait for IPI to finish on other CPUS */
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if (wait) {
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for_each_cpu(i, &cpu_mask) {
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int j;
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for (j = 0 ; j < 1000; j++) {
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ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
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if (!ipi.vector)
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break;
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udelay(100);
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}
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/* Timeout? */
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if (ipi.vector) {
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printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
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ret = -ETIMEDOUT;
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dump_stack();
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}
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}
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}
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return ret;
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}
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/*
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* You must not call this function with disabled interrupts or from a
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* hardware interrupt handler or from a bottom half handler.
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*/
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int smp_call_function(void (*func)(void *info), void *info, int wait)
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{
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cpumask_t cpu_mask;
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struct call_data_struct data;
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int ret;
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cpumask_setall(&cpu_mask);
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cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
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WARN_ON(irqs_disabled());
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data.func = func;
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data.info = info;
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data.wait = wait;
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spin_lock(&call_lock);
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call_data = &data;
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ret = send_ipi(IPI_CALL, wait, cpu_mask);
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spin_unlock(&call_lock);
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return ret;
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}
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irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id)
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{
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void (*func) (void *info) = call_data->func;
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void *info = call_data->info;
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reg_intr_vect_rw_ipi ipi;
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ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);
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if (ipi.vector & IPI_SCHEDULE) {
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scheduler_ipi();
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}
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if (ipi.vector & IPI_CALL) {
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func(info);
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}
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if (ipi.vector & IPI_FLUSH_TLB) {
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if (flush_mm == FLUSH_ALL)
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__flush_tlb_all();
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else if (flush_vma == FLUSH_ALL)
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__flush_tlb_mm(flush_mm);
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else
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__flush_tlb_page(flush_vma, flush_addr);
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}
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ipi.vector = 0;
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REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);
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return IRQ_HANDLED;
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}
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