66 lines
2.0 KiB
C
66 lines
2.0 KiB
C
/*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/spinlock.h>
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#include <linux/tegra-powergate.h>
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static struct powergate_partition_info tegra30_powergate_partition_info[] = {
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[TEGRA_POWERGATE_CPU] = { .name = "cpu0" },
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[TEGRA_POWERGATE_3D] = { .name = "3d0" },
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[TEGRA_POWERGATE_VENC] = { .name = "venc" },
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[TEGRA_POWERGATE_VDEC] = { .name = "vdec" },
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[TEGRA_POWERGATE_PCIE] = { .name = "pcie" },
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[TEGRA_POWERGATE_L2] = { .name = "l2" },
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[TEGRA_POWERGATE_MPE] = { .name = "mpe" },
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[TEGRA_POWERGATE_HEG] = { .name = "heg" },
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[TEGRA_POWERGATE_SATA] = { .name = "sata" },
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[TEGRA_POWERGATE_CPU1] = { .name = "cpu1" },
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[TEGRA_POWERGATE_CPU2] = { .name = "cpu2" },
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[TEGRA_POWERGATE_CPU3] = { .name = "cpu3" },
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[TEGRA_POWERGATE_CELP] = { .name = "celp" },
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[TEGRA_POWERGATE_3D1] = { .name = "3d1" },
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};
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static const u8 tegra30_cpu_domains[] = {
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TEGRA_POWERGATE_CPU,
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TEGRA_POWERGATE_CPU1,
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TEGRA_POWERGATE_CPU2,
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TEGRA_POWERGATE_CPU3,
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};
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static const char *tegra30_get_powerdomain_name(int id)
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{
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return tegra30_powergate_partition_info[id].name;
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}
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static struct powergate_ops tegra30_powergate_ops = {
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.get_powergate_domain_name = tegra30_get_powerdomain_name,
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.powergate_partition = NULL,
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.unpowergate_partition = NULL,
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};
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static struct powergate t30_powergate = {
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.soc_name = "tegra30",
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.num_powerdomains = 14,
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.num_cpu_domains = 4,
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.cpu_domain_map = tegra30_cpu_domains,
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.ops = &tegra30_powergate_ops,
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};
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struct powergate * __init tegra30_powergate_init(void)
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{
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return &t30_powergate;
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}
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