1398 lines
36 KiB
Plaintext
1398 lines
36 KiB
Plaintext
#include <dt-bindings/input/input.h>
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#include <dt-bindings/mfd/as3722.h>
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#include <dt-bindings/thermal/thermal.h>
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#include "tegra124.dtsi"
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/ {
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compatible = "google,nyan", "nvidia,tegra124";
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memory {
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reg = <0x0 0x80000000 0x80000000>;
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};
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firmware {
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chromeos {
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write-protect-gpio = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
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ddr-type = "ddr3l";
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};
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};
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host1x@50000000 {
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dc@54200000 {
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avdd-lcd-supply = <&avdd_lcd>;
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vdd-lcd-bl-supply = <&vdd_lcd_bl>;
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lcd-bl-en-supply = <&lcd_bl_en>;
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bl-device = <&backlight>;
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};
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dc@54240000 {
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avdd-hdmi-pex-supply = <&avdd_hdmi_pex>;
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avdd-hdmi-pll-supply = <&avdd_hdmi_pll>;
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vdd-hdmi-5v0-supply = <&vdd_hdmi_5v0>;
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hdmi-hpd-gpios = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
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};
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hdmi@54280000 {
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vdd-supply = <&avdd_hdmi_pex>;
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pll-supply = <&avdd_hdmi_pll>;
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hdmi-supply = <&vdd_hdmi_5v0>;
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};
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gk20a@57000000 {
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vddgpu-supply = <&vdd_gpu>;
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};
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};
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pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux@0 {
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dap_mclk1_pw4 {
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nvidia,pins = "dap_mclk1_pw4";
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nvidia,function = "extperiph1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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dap2_din_pa4 {
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nvidia,pins = "dap2_din_pa4";
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nvidia,function = "i2s1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dap2_dout_pa5 {
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nvidia,pins = "dap2_dout_pa5",
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"dap2_fs_pa2",
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"dap2_sclk_pa3";
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nvidia,function = "i2s1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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dap3_dout_pp2 {
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nvidia,pins = "dap3_dout_pp2";
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nvidia,function = "i2s2";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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dvfs_pwm_px0 {
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nvidia,pins = "dvfs_pwm_px0",
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"dvfs_clk_px2";
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nvidia,function = "cldvfs";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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ulpi_clk_py0 {
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nvidia,pins = "ulpi_clk_py0",
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"ulpi_nxt_py2",
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"ulpi_stp_py3";
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nvidia,function = "spi1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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ulpi_dir_py1 {
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nvidia,pins = "ulpi_dir_py1";
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nvidia,function = "spi1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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cam_i2c_scl_pbb1 {
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nvidia,pins = "cam_i2c_scl_pbb1",
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"cam_i2c_sda_pbb2";
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nvidia,function = "i2c3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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};
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gen2_i2c_scl_pt5 {
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nvidia,pins = "gen2_i2c_scl_pt5",
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"gen2_i2c_sda_pt6";
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nvidia,function = "i2c2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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};
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pj7 {
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nvidia,pins = "pj7";
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nvidia,function = "uartd";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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spdif_in_pk6 {
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nvidia,pins = "spdif_in_pk6";
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nvidia,function = "spdif";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pk7 {
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nvidia,pins = "pk7";
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nvidia,function = "uartd";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pg4 {
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nvidia,pins = "pg4",
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"pg5",
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"pg6",
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"pi3";
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nvidia,function = "spi4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pg7 {
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nvidia,pins = "pg7";
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nvidia,function = "spi4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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ph1 {
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nvidia,pins = "ph1";
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nvidia,function = "pwm1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pk0 {
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nvidia,pins = "pk0",
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"kb_row15_ps7",
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"clk_32k_out_pa0";
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nvidia,function = "soc";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc1_clk_pz0 {
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nvidia,pins = "sdmmc1_clk_pz0";
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nvidia,function = "sdmmc1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc1_cmd_pz1 {
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nvidia,pins = "sdmmc1_cmd_pz1",
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"sdmmc1_dat0_py7",
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"sdmmc1_dat1_py6",
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"sdmmc1_dat2_py5",
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"sdmmc1_dat3_py4";
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nvidia,function = "sdmmc1";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc3_clk_pa6 {
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nvidia,pins = "sdmmc3_clk_pa6";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc3_cmd_pa7 {
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nvidia,pins = "sdmmc3_cmd_pa7",
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"sdmmc3_dat0_pb7",
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"sdmmc3_dat1_pb6",
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"sdmmc3_dat2_pb5",
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"sdmmc3_dat3_pb4",
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"kb_col4_pq4",
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"sdmmc3_clk_lb_out_pee4",
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"sdmmc3_clk_lb_in_pee5",
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"sdmmc3_cd_n_pv2";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc4_clk_pcc4 {
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nvidia,pins = "sdmmc4_clk_pcc4";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc4_cmd_pt7 {
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nvidia,pins = "sdmmc4_cmd_pt7",
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"sdmmc4_dat0_paa0",
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"sdmmc4_dat1_paa1",
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"sdmmc4_dat2_paa2",
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"sdmmc4_dat3_paa3",
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"sdmmc4_dat4_paa4",
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"sdmmc4_dat5_paa5",
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"sdmmc4_dat6_paa6",
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"sdmmc4_dat7_paa7";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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mic_det_l {
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nvidia,pins = "kb_row7_pr7";
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nvidia,function = "rsvd2";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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kb_row10_ps2 {
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nvidia,pins = "kb_row10_ps2";
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nvidia,function = "uarta";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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kb_row9_ps1 {
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nvidia,pins = "kb_row9_ps1";
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nvidia,function = "uarta";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pwr_i2c_scl_pz6 {
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nvidia,pins = "pwr_i2c_scl_pz6",
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"pwr_i2c_sda_pz7";
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nvidia,function = "i2cpwr";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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};
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jtag_rtck {
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nvidia,pins = "jtag_rtck";
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nvidia,function = "rtck";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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clk_32k_in {
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nvidia,pins = "clk_32k_in";
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nvidia,function = "clk";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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core_pwr_req {
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nvidia,pins = "core_pwr_req";
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nvidia,function = "pwron";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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cpu_pwr_req {
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nvidia,pins = "cpu_pwr_req";
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nvidia,function = "cpu";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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kb_col0_ap {
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nvidia,pins = "kb_col0_pq0";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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en_vdd_sd {
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nvidia,pins = "kb_row0_pr0";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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lid_open {
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nvidia,pins = "kb_row4_pr4";
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nvidia,function = "rsvd3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pwr_int_n {
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nvidia,pins = "pwr_int_n";
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nvidia,function = "pmi";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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reset_out_n {
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nvidia,pins = "reset_out_n";
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nvidia,function = "reset_out_n";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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clk3_out_pee0 {
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nvidia,pins = "clk3_out_pee0";
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nvidia,function = "extperiph3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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gen1_i2c_scl_pc4 {
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nvidia,pins = "gen1_i2c_scl_pc4",
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"gen1_i2c_sda_pc5";
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nvidia,function = "i2c1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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};
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hdmi_cec_pee3 {
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nvidia,pins = "hdmi_cec_pee3";
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nvidia,function = "cec";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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nvidia,open-drain = <TEGRA_PIN_DISABLE>;
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};
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hdmi_int_pn7 {
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nvidia,pins = "hdmi_int_pn7";
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nvidia,function = "rsvd1";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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ddc_scl_pv4 {
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nvidia,pins = "ddc_scl_pv4",
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"ddc_sda_pv5";
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nvidia,function = "i2c4";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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nvidia,rcv-sel = <TEGRA_PIN_PULL_DOWN>;
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};
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usb_vbus_en0_pn4 {
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nvidia,pins = "usb_vbus_en0_pn4",
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"usb_vbus_en1_pn5",
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"usb_vbus_en2_pff1";
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nvidia,function = "usb";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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nvidia,open-drain = <TEGRA_PIN_DISABLE>;
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};
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drive_sdio1 {
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nvidia,pins = "drive_sdio1";
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nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
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nvidia,schmitt = <TEGRA_PIN_DISABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <36>;
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nvidia,pull-up-strength = <20>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
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};
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drive_sdio3 {
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nvidia,pins = "drive_sdio3";
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nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
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nvidia,schmitt = <TEGRA_PIN_DISABLE>;
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nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
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nvidia,pull-down-strength = <22>;
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nvidia,pull-up-strength = <36>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
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};
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drive_gma {
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nvidia,pins = "drive_gma";
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nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
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nvidia,schmitt = <TEGRA_PIN_DISABLE>;
|
|
nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
nvidia,pull-down-strength = <2>;
|
|
nvidia,pull-up-strength = <1>;
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
nvidia,drive-type = <1>;
|
|
};
|
|
ac_ok {
|
|
nvidia,pins = "pj0";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
codec_irq_l {
|
|
nvidia,pins = "ph4";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd_bl_en {
|
|
nvidia,pins = "ph2";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
touch_irq_l {
|
|
nvidia,pins = "gpio_w3_aud_pw3";
|
|
nvidia,function = "spi6";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
tpm_davint_l {
|
|
nvidia,pins = "ph6";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ts_irq_l {
|
|
nvidia,pins = "pk2";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ts_reset_l {
|
|
nvidia,pins = "pk4";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
ts_shdn_l {
|
|
nvidia,pins = "pk1";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
ph7 {
|
|
nvidia,pins = "ph7";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sensor_irq_l {
|
|
nvidia,pins = "pi6";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
wifi_en {
|
|
nvidia,pins = "gpio_x7_aud_px7";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
chromeos_write_protect {
|
|
nvidia,pins = "kb_row1_pr1";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
};
|
|
};
|
|
|
|
serial@70006000 {
|
|
status = "okay";
|
|
};
|
|
|
|
pwm {
|
|
status = "okay";
|
|
};
|
|
|
|
rtc {
|
|
nvidia,pmc-wakeup = <&pmc 1 16 4>;
|
|
};
|
|
|
|
i2c@7000c000 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
|
|
max98090: max98090 {
|
|
compatible = "maxim,max98090";
|
|
reg = <0x10>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
|
|
dvdd-supply = <&gen_avdd_1v2>;
|
|
};
|
|
|
|
tmp451: temperature-sensor@4c {
|
|
compatible = "ti,tmp451";
|
|
reg = <0x4c>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
|
|
vcc-supply = <&_3v3_run>;
|
|
|
|
#thermal-sensor-cells = <1>;
|
|
};
|
|
};
|
|
|
|
i2c@7000c400 {
|
|
status = "okay";
|
|
|
|
touchscreen {
|
|
compatible = "atmel,atmel_mxt_ts";
|
|
reg = <0x4a>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(K, 2) IRQ_TYPE_EDGE_FALLING>;
|
|
};
|
|
|
|
touchscreen-bootloader {
|
|
compatible = "atmel,atmel_mxt_ts";
|
|
reg = <0x26>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(K, 2) IRQ_TYPE_EDGE_FALLING>;
|
|
};
|
|
};
|
|
|
|
i2c@7000c500 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
trusted-platform-module {
|
|
compatible = "infineon,slb9645tt";
|
|
reg = <0x20>;
|
|
powered-while-suspended;
|
|
};
|
|
};
|
|
|
|
i2c@7000c700 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
i2c@7000d000 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
ams3722: pmic@40 {
|
|
compatible = "ams,as3722";
|
|
reg = <0x40>;
|
|
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
nvidia,pmc-wakeup = <&pmc 1 18 8>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
ams,system-power-controller;
|
|
|
|
ams,sd0-adc-ch = <AS3722_TEMP1_SD0>;
|
|
ams,sd1-adc-ch = <AS3722_TEMP_SD1>;
|
|
ams,sd6-adc-ch = <AS3722_TEMP2_SD6>;
|
|
#thermal-sensor-cells = <1>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&as3722_default>;
|
|
|
|
as3722_default: pinmux@0 {
|
|
gpio0 {
|
|
pins = "gpio0";
|
|
function = "gpio";
|
|
bias-pull-down;
|
|
};
|
|
|
|
gpio1 {
|
|
pins = "gpio1";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
low-power-enable = <AS3722_GPIO_LOW_POWER_MODE(4, 0x7)>;
|
|
};
|
|
|
|
gpio2_4_7 {
|
|
pins = "gpio2", "gpio4", "gpio7";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
};
|
|
|
|
gpio3 {
|
|
pins = "gpio3";
|
|
function = "gpio";
|
|
bias-high-impedance;
|
|
};
|
|
|
|
gpio5 {
|
|
pins = "gpio5";
|
|
function = "clk32k-out";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
vsup-sd2-supply = <&floating>;
|
|
vsup-sd3-supply = <&floating>;
|
|
vsup-sd4-supply = <&floating>;
|
|
vsup-sd5-supply = <&floating>;
|
|
vin-ldo0-supply = <&as3722_sd2>;
|
|
vin-ldo1-6-supply = <&floating>;
|
|
vin-ldo2-5-7-supply = <&vddio_1v8>;
|
|
vin-ldo3-4-supply = <&floating>;
|
|
vin-ldo9-10-supply = <&floating>;
|
|
vin-ldo11-supply = <&floating>;
|
|
|
|
vdd_cpu: sd0 {
|
|
regulator-name = "vdd_cpu";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-max-microamp = <3500000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-disabled;
|
|
ams,ext-control = <2>;
|
|
};
|
|
|
|
sd1 {
|
|
regulator-name = "vdd_core";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-max-microamp = <4000000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-disabled;
|
|
ams,ext-control = <1>;
|
|
ams,standby-sequence = <6>;
|
|
};
|
|
|
|
as3722_sd2: sd2 {
|
|
regulator-name = "vddio_ddr";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-enabled;
|
|
};
|
|
|
|
as3722_sd3: sd3 {
|
|
regulator-name = "sd3";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-enabled;
|
|
};
|
|
|
|
avdd_hdmi_pex: sd4 {
|
|
regulator-name = "avdd-hdmi-pex";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-boot-on;
|
|
regulator-suspend-mem-disabled;
|
|
ams,standby-sequence = <3>;
|
|
};
|
|
|
|
vddio_1v8: sd5 {
|
|
regulator-name = "vdd-1v8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-enabled;
|
|
};
|
|
|
|
vdd_gpu: sd6 {
|
|
regulator-name = "vdd_gpu";
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-max-microamp = <3500000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-disabled;
|
|
ams,standby-sequence = <0>;
|
|
};
|
|
|
|
run_avdd_1v05: ldo0 {
|
|
regulator-name = "avdd-pll";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-disabled;
|
|
ams,ext-control = <1>;
|
|
ams,standby-sequence = <5>;
|
|
};
|
|
|
|
run_cam_1v8: ldo1 {
|
|
regulator-name = "vdd_cam";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-suspend-mem-disabled;
|
|
};
|
|
|
|
gen_avdd_1v2: ldo2 {
|
|
regulator-name = "vddio_hsic";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-disabled;
|
|
ams,standby-sequence = <2>;
|
|
};
|
|
|
|
lp0_vdd_rtc_1v0: ldo3 {
|
|
regulator-name = "vdd_rtc";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
regulator-suspend-mem-enabled;
|
|
ams,enable-tracking;
|
|
};
|
|
|
|
run_cam_2v8: ldo4 {
|
|
regulator-name = "avdd_cam";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-suspend-mem-disabled;
|
|
ams,standby-sequence = <1>;
|
|
};
|
|
|
|
run_cam_front_1v2: ldo5 {
|
|
regulator-name = "vdig";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-suspend-mem-disabled;
|
|
};
|
|
|
|
vddio_sdmmc3: ldo6 {
|
|
regulator-name = "vddio_sdmmc";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-suspend-mem-disabled;
|
|
};
|
|
|
|
run_cam_rear_en_1v05: ldo7 {
|
|
regulator-name = "vdd_cam1";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-suspend-mem-disabled;
|
|
};
|
|
|
|
run_touch_2v8: ldo9 {
|
|
regulator-name = "avdd";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-suspend-mem-disabled;
|
|
};
|
|
|
|
run_cam_af_2v8: ldo10 {
|
|
regulator-name = "avdd_af1_cam";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-suspend-mem-disabled;
|
|
};
|
|
|
|
run_vpp_fuse_1v8: ldo11 {
|
|
regulator-name = "vpp_fuse";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-suspend-mem-disabled;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
spi@7000d400 {
|
|
status = "okay";
|
|
ec: cros-ec@0 {
|
|
compatible = "google,cros-ec-spi";
|
|
spi-max-frequency = <3000000>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
|
|
nvidia,pmc-wakeup = <&pmc 1 8 8>;
|
|
reg = <0>;
|
|
|
|
google,cros-ec-spi-msg-delay = <2000>;
|
|
|
|
i2c_20: i2c-tunnel {
|
|
compatible = "google,cros-ec-i2c-tunnel";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
google,remote-bus = <0>;
|
|
|
|
charger: bq24735 {
|
|
compatible = "ti,bq24735";
|
|
reg = <0x9>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(J, 0)
|
|
IRQ_TYPE_EDGE_BOTH>;
|
|
ti,ac-detect-gpios = <&gpio
|
|
TEGRA_GPIO(J, 0)
|
|
GPIO_ACTIVE_HIGH>;
|
|
ti,external-control;
|
|
};
|
|
|
|
battery: smart-battery {
|
|
compatible = "sbs,sbs-battery";
|
|
reg = <0xb>;
|
|
battery-name = "battery";
|
|
sbs,i2c-retry-count = <2>;
|
|
sbs,poll-retry-count = <10>;
|
|
power-supplies = <&charger>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
spi@7000da00 {
|
|
status = "okay";
|
|
spidev@0 {
|
|
compatible = "spidev";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
};
|
|
};
|
|
|
|
pmc {
|
|
nvidia,invert-interrupt;
|
|
nvidia,suspend-mode = <0>;
|
|
#wake-cells = <3>;
|
|
nvidia,cpu-pwr-good-time = <500>;
|
|
nvidia,cpu-pwr-off-time = <300>;
|
|
nvidia,core-pwr-good-time = <641 3845>;
|
|
nvidia,core-pwr-off-time = <61036>;
|
|
nvidia,core-power-req-active-high;
|
|
nvidia,sys-clock-req-active-high;
|
|
};
|
|
|
|
fuse@7000f800 {
|
|
vdd-supply = <&run_vpp_fuse_1v8>;
|
|
};
|
|
|
|
ahub {
|
|
i2s@70301100 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
hda@70030000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb@70090000 {
|
|
status = "okay";
|
|
s1p05v-supply = <&avdd_hdmi_pex>; /* avddio_usb */
|
|
s3p3v-supply = <&_3v3_lp0>; /* hvdd_pex_pll_e */
|
|
s1p8v-supply = <&vddio_1v8>; /* avdd_pll_utmip */
|
|
xusb-utmi0-wake {
|
|
nvidia,pmc-wakeup = <&pmc 1 39 4>;
|
|
};
|
|
xusb-utmi2-wake {
|
|
nvidia,pmc-wakeup = <&pmc 1 41 4>;
|
|
};
|
|
xusb-ss-wake {
|
|
nvidia,pmc-wakeup = <&pmc 1 58 4>;
|
|
};
|
|
};
|
|
|
|
phy@7009f000 {
|
|
status = "okay";
|
|
nvidia,ss-pads = <0x3>; /* SSP0, SSP1 */
|
|
nvidia,hsic-pads = <0x0>;
|
|
nvidia,utmi-pads = <0x7>; /* USB2P0, USB2P1, USB2P2 */
|
|
nvidia,ss-portmap = <0x20>; /* SSP0->USB2P0, SSP1->USB2P2 */
|
|
nvidia,lane-owner = <0x6>; /* USB3P0 USB3P1 */
|
|
vbus1-supply = <&usb1_vbus_reg>;
|
|
vbus2-supply = <&run_cam_2v8>;
|
|
vbus3-supply = <&usb3_vbus_reg>;
|
|
vddio-hsic-supply = <&gen_avdd_1v2>;
|
|
};
|
|
|
|
sdhci@700b0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
card-reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
|
|
bus-width = <4>;
|
|
no-1-8-v;
|
|
non-removable;
|
|
status = "okay";
|
|
nvidia,host-off-card-on;
|
|
keep-power-in-suspend;
|
|
tap-delay = <2>;
|
|
|
|
nvidia,vmax = <1150>;
|
|
nvidia,vmin = <950>;
|
|
nvidia,t2t-vnom-slope = <25>;
|
|
nvidia,t2t-vnom-int = <115933>;
|
|
nvidia,t2t-vmax-slope = <25>;
|
|
nvidia,t2t-vmax-int = <115933>;
|
|
nvidia,t2t-vmin-slope = <47>;
|
|
nvidia,t2t-vmin-int = <187224>;
|
|
|
|
tuning-data@0 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <81600000>;
|
|
nvidia,thole-vnom-slope = <2916>;
|
|
nvidia,thole-vnom-int = <331143>;
|
|
nvidia,thole-vmax-slope = <2916>;
|
|
nvidia,thole-vmax-int = <331143>;
|
|
nvidia,thole-vmin-slope = <1480>;
|
|
nvidia,thole-vmin-int = <232373>;
|
|
};
|
|
tuning-data@1 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <136000000>;
|
|
nvidia,thole-vnom-slope = <1554>;
|
|
nvidia,thole-vnom-int = <167210>;
|
|
nvidia,thole-vmax-slope = <1554>;
|
|
nvidia,thole-vmax-int = <167210>;
|
|
nvidia,thole-vmin-slope = <793>;
|
|
nvidia,thole-vmin-int = <115672>;
|
|
};
|
|
tuning-data@2 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <204000000>;
|
|
nvidia,thole-vnom-slope = <874>;
|
|
nvidia,thole-vnom-int = <85243>;
|
|
nvidia,thole-vmax-slope = <874>;
|
|
nvidia,thole-vmax-int = <85243>;
|
|
nvidia,thole-vmin-slope = <449>;
|
|
nvidia,thole-vmin-int = <57321>;
|
|
};
|
|
};
|
|
|
|
sdhci@700b0400 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
|
|
no-1-8-v;
|
|
bus-width = <4>;
|
|
status = "okay";
|
|
vmmc-supply = <&_3v3_sd_card>;
|
|
vqmmc-supply = <&vddio_sdmmc3>;
|
|
tap-delay = <3>;
|
|
|
|
nvidia,disable-ext-loopback;
|
|
|
|
nvidia,vmax = <1150>;
|
|
nvidia,vmin = <950>;
|
|
nvidia,t2t-vnom-slope = <29>;
|
|
nvidia,t2t-vnom-int = <124427>;
|
|
nvidia,t2t-vmax-slope = <29>;
|
|
nvidia,t2t-vmax-int = <124427>;
|
|
nvidia,t2t-vmin-slope = <54>;
|
|
nvidia,t2t-vmin-int = <203707>;
|
|
|
|
tuning-data@0 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <81600000>;
|
|
nvidia,thole-vnom-slope = <2504>;
|
|
nvidia,thole-vnom-int = <281460>;
|
|
nvidia,thole-vmax-slope = <2504>;
|
|
nvidia,thole-vmax-int = <281460>;
|
|
nvidia,thole-vmin-slope = <1262>;
|
|
nvidia,thole-vmin-int = <194452>;
|
|
};
|
|
tuning-data@1 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <136000000>;
|
|
nvidia,thole-vnom-slope = <1146>;
|
|
nvidia,thole-vnom-int = <117841>;
|
|
nvidia,thole-vmax-slope = <1146>;
|
|
nvidia,thole-vmax-int = <117841>;
|
|
nvidia,thole-vmin-slope = <589>;
|
|
nvidia,thole-vmin-int = <78993>;
|
|
};
|
|
tuning-data@2 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <204000000>;
|
|
nvidia,thole-vnom-slope = <468>;
|
|
nvidia,thole-vnom-int = <36031>;
|
|
nvidia,thole-vmax-slope = <468>;
|
|
nvidia,thole-vmax-int = <36031>;
|
|
nvidia,thole-vmin-slope = <253>;
|
|
nvidia,thole-vmin-int = <21264>;
|
|
};
|
|
};
|
|
|
|
sdhci@700b0600 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
bus-width = <8>;
|
|
no-1-8-v;
|
|
non-removable;
|
|
status = "okay";
|
|
tap-delay = <5>;
|
|
|
|
nvidia,vmax = <1150>;
|
|
nvidia,vmin = <950>;
|
|
nvidia,t2t-vnom-slope = <27>;
|
|
nvidia,t2t-vnom-int = <118295>;
|
|
nvidia,t2t-vmax-slope = <27>;
|
|
nvidia,t2t-vmax-int = <118295>;
|
|
nvidia,t2t-vmin-slope = <48>;
|
|
nvidia,t2t-vmin-int = <188148>;
|
|
|
|
tuning-data@0 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <81600000>;
|
|
nvidia,thole-vnom-slope = <3090>;
|
|
nvidia,thole-vnom-int = <351666>;
|
|
nvidia,thole-vmax-slope = <3090>;
|
|
nvidia,thole-vmax-int = <351666>;
|
|
nvidia,thole-vmin-slope = <1583>;
|
|
nvidia,thole-vmin-int = <247913>;
|
|
};
|
|
tuning-data@1 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <136000000>;
|
|
nvidia,thole-vnom-slope = <1703>;
|
|
nvidia,thole-vnom-int = <186307>;
|
|
nvidia,thole-vmax-slope = <1703>;
|
|
nvidia,thole-vmax-int = <186307>;
|
|
nvidia,thole-vmin-slope = <890>;
|
|
nvidia,thole-vmin-int = <130617>;
|
|
};
|
|
tuning-data@2 {
|
|
compatible = "nvidia,sdhci-tuning-data";
|
|
clock-frequency = <200000000>;
|
|
nvidia,thole-vnom-slope = <1037>;
|
|
nvidia,thole-vnom-int = <106934>;
|
|
nvidia,thole-vmax-slope = <1037>;
|
|
nvidia,thole-vmax-int = <106934>;
|
|
nvidia,thole-vmin-slope = <558>;
|
|
nvidia,thole-vmin-int = <74315>;
|
|
};
|
|
};
|
|
|
|
dfll@70110000 {
|
|
vdd-supply = <&vdd_cpu>;
|
|
board-params = <&{/cpu_dfll_board_params}>;
|
|
pmic-integration = <&{/cpu_dfll_pmic_integration}>;
|
|
status = "okay";
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
pwms = <&pwm 1 1000000>;
|
|
default-brightness-level = <224>;
|
|
vdd-lcd-bl-supply = <&vdd_lcd_bl>;
|
|
lcd-bl-en-supply = <&lcd_bl_en>;
|
|
pwm-to-bl-on = <20>;
|
|
bl-off-to-pwm = <10>;
|
|
brightness-levels =
|
|
< 0 1 2 3 4 5 6 7
|
|
8 9 10 11 12 13 14 15
|
|
16 17 18 19 20 21 22 23
|
|
24 25 26 27 28 29 30 31
|
|
32 33 34 35 36 37 38 39
|
|
40 41 42 43 44 45 46 47
|
|
48 49 50 51 52 53 54 55
|
|
56 57 58 59 60 61 62 63
|
|
64 65 66 67 68 69 70 71
|
|
72 73 74 75 76 77 78 79
|
|
80 81 82 83 84 85 86 87
|
|
88 89 90 91 92 93 94 95
|
|
96 97 98 99 100 101 102 103
|
|
104 105 106 107 108 109 110 111
|
|
112 113 114 115 116 117 118 119
|
|
120 121 122 123 124 125 126 127
|
|
128 129 130 131 132 133 134 135
|
|
136 137 138 139 140 141 142 143
|
|
144 145 146 147 148 149 150 151
|
|
152 153 154 155 156 157 158 159
|
|
160 161 162 163 164 165 166 167
|
|
168 169 170 171 172 173 174 175
|
|
176 177 178 179 180 181 182 183
|
|
184 185 186 187 188 189 190 191
|
|
192 193 194 195 196 197 198 199
|
|
200 201 202 203 204 205 206 207
|
|
208 209 210 211 212 213 214 215
|
|
216 217 218 219 220 221 222 223
|
|
224 225 226 227 228 229 230 231
|
|
232 233 234 235 236 237 238 239
|
|
240 241 242 243 244 245 246 247
|
|
248 249 250 251 252 253 254 255
|
|
256>;
|
|
};
|
|
|
|
clocks {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
clk32k_in: clock {
|
|
compatible = "fixed-clock";
|
|
reg = <0>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
};
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
lid {
|
|
label = "Lid";
|
|
gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
|
|
linux,input-type = <5>;
|
|
linux,code = <0>;
|
|
debounce-interval = <1>;
|
|
gpio-key,wakeup;
|
|
nvidia,pmc-wakeup = <&pmc 0 50 0>;
|
|
};
|
|
|
|
power {
|
|
label = "Power";
|
|
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_POWER>;
|
|
debounce-interval = <30>;
|
|
gpio-key,wakeup;
|
|
nvidia,pmc-wakeup = <&pmc 0 51 0>;
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
floating: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "floating";
|
|
};
|
|
|
|
usb1_vbus_reg: regulator@2 {
|
|
compatible = "regulator-fixed";
|
|
reg = <2>;
|
|
regulator-name = "usb1_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
usb3_vbus_reg: regulator@3 {
|
|
compatible = "regulator-fixed";
|
|
reg = <3>;
|
|
regulator-name = "usb3_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
wifi_clk32k_reg: regulator@4 {
|
|
compatible = "regulator-fixed";
|
|
reg = <4>;
|
|
regulator-name = "wifi-clk32k";
|
|
enable-active-high;
|
|
gpio = <&ams3722 5 GPIO_ACTIVE_HIGH>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
avdd_lcd: regulator@5 {
|
|
compatible = "regulator-fixed";
|
|
reg = <5>;
|
|
regulator-name = "avdd-lcd";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
gpio = <&ams3722 4 GPIO_ACTIVE_HIGH>; /* AS3722 GPIO 4 */
|
|
};
|
|
|
|
vdd_lcd_bl: regulator@6 {
|
|
compatible = "regulator-fixed";
|
|
reg = <6>;
|
|
regulator-name = "vdd-lcd-bl";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
lcd_bl_en: regulator@7 {
|
|
compatible = "regulator-fixed";
|
|
reg = <7>;
|
|
regulator-name = "lcd-bl-en";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
vdd_hdmi_5v0: regulator@8 {
|
|
compatible = "regulator-fixed";
|
|
reg = <8>;
|
|
regulator-name = "vdd-hdmi-5v0";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
avdd_hdmi_pll: regulator@9 {
|
|
compatible = "regulator-fixed";
|
|
reg = <9>;
|
|
regulator-name = "avdd-hdmi-pll";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
enable-active-low;
|
|
regulator-boot-on;
|
|
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
vdd_ts: regulator@10 {
|
|
compatible = "regulator-fixed";
|
|
reg = <10>;
|
|
regulator-name = "vdd-ts";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
_3v3_lp0: regulator@11 {
|
|
compatible = "regulator-fixed";
|
|
reg = <11>;
|
|
regulator-name = "3v3-lp0";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
_3v3_sd_card: regulator@12 {
|
|
compatible = "regulator-fixed";
|
|
reg = <12>;
|
|
regulator-name = "3v3-sd-card";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
enable-active-high;
|
|
regulator-boot-on;
|
|
gpio = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
_3v3_run: regulator@13 {
|
|
compatible = "regulator-fixed";
|
|
reg = <13>;
|
|
regulator-name = "3v3-run";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
gpio = <&ams3722 1 GPIO_ACTIVE_HIGH>; /* AS3722 GPIO 1 */
|
|
};
|
|
};
|
|
|
|
soc_therm {
|
|
compatible = "nvidia,tegra124-soctherm";
|
|
reg = <0x0 0x700e2000 0x1000>;
|
|
interrupts = <GIC_SPI 48 IRQ_TYPE_NONE>;
|
|
clocks = <&tegra_car TEGRA124_CLK_SOC_THERM>,
|
|
<&tegra_car TEGRA124_CLK_TSENSOR>;
|
|
clock-names = "soc_therm", "tsensor";
|
|
pmu-16bit-ops = <0>;
|
|
pmu-i2c-addr = <0x40>;
|
|
i2c-controller-id = <4>;
|
|
poweroff-reg-addr = <0x36>;
|
|
poweroff-reg-data = <0x2>;
|
|
|
|
cpu-edp-cdev = <&{/cpu_edp_cdev_action}>;
|
|
dfll-cdev = <&{/dfll_cdev_action}>;
|
|
};
|
|
|
|
cpu_dfll_board_params {
|
|
sample-rate = <12500>;
|
|
fixed-output-forcing;
|
|
cf = <10>;
|
|
ci = <0>;
|
|
cg = <2>;
|
|
droop-cut-value = <0xf>;
|
|
droop-restore-ramp = <0x0>;
|
|
scale-out-ramp = <0x0>;
|
|
};
|
|
|
|
cpu_dfll_pmic_integration {
|
|
pmic-i2c-interface;
|
|
pmic-i2c-address = <0x80>;
|
|
pmic-i2c-voltage-register = <0x00>;
|
|
i2c-fs-rate = <400000>;
|
|
dfll-min-microvolt = <700000>;
|
|
dfll-max-microvolt = <1350000>;
|
|
};
|
|
|
|
dfll_cdev_action {
|
|
compatible = "nvidia,tegra124-dfll-cdev-action";
|
|
act-dev = <&{/dfll@70110000}>;
|
|
cdev-floor-type = "DFLL-floor";
|
|
cdev-cap-type = "DFLL-cap";
|
|
};
|
|
|
|
sound {
|
|
compatible = "nvidia,tegra-audio-max98090-venice2",
|
|
"nvidia,tegra-audio-max98090";
|
|
nvidia,model = "NVIDIA Tegra Venice2";
|
|
|
|
nvidia,audio-routing =
|
|
"Headphone Jack", "HPR",
|
|
"Headphone Jack", "HPL",
|
|
"DMICL", "Int Mic",
|
|
"DMICR", "Int Mic",
|
|
"IN34", "Mic Jack",
|
|
"Speakers", "SPKR",
|
|
"Speakers", "SPKL";
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
nvidia,audio-codec = <&max98090>;
|
|
|
|
clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
|
|
<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
|
|
<&tegra_car TEGRA124_CLK_EXTERN1>;
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
};
|
|
|
|
cpu_edp {
|
|
compatible = "nvidia,tegra124-cpu-edp";
|
|
regulator-ma = <8000>;
|
|
};
|
|
|
|
cpu_edp_cdev_action {
|
|
compatible = "nvidia,tegra124-cpu-edp-cdev-action";
|
|
act-dev = <&{/cpu_edp}>;
|
|
cdev-cap-type = "CPU-EDP-cap";
|
|
};
|
|
|
|
throttle0: tj-temperature-throttling {
|
|
compatible = "nvidia,tegra124-tj-throttle";
|
|
clocks = <&tegra_car TEGRA124_CLK_CAP_THROTTLE_C3BUS>,
|
|
<&tegra_car TEGRA124_CLK_CAP_THROTTLE_SCLK>,
|
|
<&tegra_car TEGRA124_CLK_CAP_THROTTLE_EMC>;
|
|
clock-names = "cap.throttle.c3bus", "cap.throttle.sclk", "cap.throttle.emc";
|
|
cpu-balanced-states = <&{/cpu-throttling-state}>;
|
|
gpu-balanced-states = <&{/gpu-throttling-state}>;
|
|
|
|
#cooling-cells = <2>; /* min followed by max */
|
|
};
|
|
|
|
thermal-zones {
|
|
board_thermal_sensor: tmp451-local {
|
|
polling-delay-passive = <2000>; /* milliseconds */
|
|
polling-delay = <0>; /* milliseconds */
|
|
|
|
thermal-sensors = <&tmp451 0>;
|
|
};
|
|
|
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diode_thermal_sensor: tmp451-remote {
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polling-delay-passive = <1000>; /* milliseconds */
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|
polling-delay = <0>; /* milliseconds */
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|
|
|
thermal-sensors = <&tmp451 1>;
|
|
};
|
|
};
|
|
};
|