264 lines
6.3 KiB
Plaintext

/dts-v1/;
#include "tegra124.dtsi"
#include "tegra124-nyan.dtsi"
#include "tegra124-nyan-emc.dtsi"
/ {
model = "Google Nyan Rev 0";
compatible = "google,nyan-rev0", "google,nyan", "nvidia,venice2",
"nvidia,tegra124";
host1x@50000000 {
dc@54200000 {
pclk = <287456400>;
h-ref-to-sync = <11>;
v-ref-to-sync = <1>;
h-sync-width = <32>;
v-sync-width = <10>;
h-back-porch = <80>;
v-back-porch = <36>;
h-active = <2560>;
v-active = <1700>;
h-front-porch = <48>;
v-front-porch = <3>;
depth = <24>;
width = <283>;
height = <195>;
power-off-time = <500>;
};
};
pinmux {
pinmux@0 {
dap1_din_pn1 {
nvidia,pins = "dap1_din_pn1",
"dap1_dout_pn2",
"dap1_fs_pn0",
"dap1_sclk_pn3";
nvidia,function = "i2s0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
dap4_din_pp5 {
nvidia,pins = "dap4_din_pp5",
"dap4_dout_pp6",
"dap4_fs_pp4",
"dap4_sclk_pp7";
nvidia,function = "i2s3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
uart2_cts_n_pj5 {
nvidia,pins = "uart2_cts_n_pj5";
nvidia,function = "uartb";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
uart2_rts_n_pj6 {
nvidia,pins = "uart2_rts_n_pj6";
nvidia,function = "uartb";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
uart2_rxd_pc3 {
nvidia,pins = "uart2_rxd_pc3";
nvidia,function = "irda";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
uart2_txd_pc2 {
nvidia,pins = "uart2_txd_pc2";
nvidia,function = "irda";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
uart3_cts_n_pa1 {
nvidia,pins = "uart3_cts_n_pa1",
"uart3_rxd_pw7";
nvidia,function = "uartc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
uart3_rts_n_pc0 {
nvidia,pins = "uart3_rts_n_pc0",
"uart3_txd_pw6";
nvidia,function = "uartc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pb0 {
nvidia,pins = "pb0",
"pb1";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kbl_pwm {
nvidia,pins = "ph0";
nvidia,function = "pwm0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row6_pr6 {
nvidia,pins = "kb_row6_pr6";
nvidia,function = "displaya_alt";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
als_irq_l {
nvidia,pins = "gpio_x3_aud_px3";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
wifi_rst_l {
nvidia,pins = "clk2_req_pcc5";
nvidia,function = "dap";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
hp_det_l {
nvidia,pins = "ulpi_data1_po2";
nvidia,function = "spi3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};
i2c@7000c400 {
clock-frequency = <100000>;
light-sensor {
compatible = "isil,isl29018";
reg = <0x44>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_NONE>;
};
trackpad {
compatible = "atmel,atmel_mxt_tp";
reg = <0x4b>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
};
trackpad-bootloader {
compatible = "atmel,atmel_mxt_tp";
reg = <0x25>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
};
};
i2c@7000d000 {
pmic@40 {
pinctrl@0 {
gpio6 {
pins = "gpio6";
function = "gpio";
bias-high-impedance;
};
};
};
};
sdhci@700b0000 {
reset-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
trim-delay = <0x2>;
calib-3v3-offsets = <0x7676>;
calib-1v8-offsets = <0x7676>;
calib-1v8-offsets-uhs-modes = <0x08>; /* DDR50 */
max-frequency = <204000000>;
};
sdhci@700b0400 {
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
wp-inverted;
trim-delay = <0x3>;
calib-3v3-offsets = <0x7676>;
calib-1v8-offsets = <0x7676>;
calib-1v8-offsets-uhs-modes = <0x08>; /* DDR50 */
max-frequency = <136000000>;
};
sdhci@700b0600 {
trim-delay = <0x4>;
ddr-trim-delay = <0x4>;
calib-3v3-offsets = <0x0202>;
calib-1v8-offsets = <0x0202>;
calib-1v8-offsets-uhs-modes = <0x28>; /* DDR50 | HS200 */
max-frequency = <200000000>;
};
sound {
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(O, 2) GPIO_ACTIVE_HIGH>;
nvidia,mic-det-gpios = <&gpio TEGRA_GPIO(R, 7)
GPIO_ACTIVE_HIGH>;
};
skin_temp: therm-est {
compatible = "nvidia,tegra124-therm-est";
toffset = <9793>;
tc1 = <10>;
tc2 = <1>;
polling-period = <1100>;
#thermal-sensor-cells = <0>;
sub-devs {
dev@0 {
dev = <&diode_thermal_sensor>;
coeffs = "2 1 1 1 1 1 1 1 1 1 1 0 1 1 0 0 0 0 -1 -7";
};
dev@1 {
dev = <&board_thermal_sensor>;
coeffs = "-11 -7 -5 -3 -3 -2 -1 0 0 0 1 1 1 2 2 3 4 6 11 18";
};
};
};
thermal-zones {
skin-therm {
polling-delay-passive = <15000>; /* milliseconds */
polling-delay = <0>; /* milliseconds */
thermal-sensors = <&skin_temp>;
trips {
balance_trip0: balance_trip {
temperature = <45000>; /* millicelsius */
hysteresis = <0>; /* millicelsius */
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&balance_trip0>;
cooling-device = <&throttle0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
};